Dr. Mark Lu Profile

Dr. Mark Lu

Manager at GLOBALFOUNDRIES Singapore

SPIE Involvement:

Author

Area of Expertise:

Tapeout , Lithography , DFM , OPC

Publications (8)

Proceedings Article | 12 April 2013 Paper

Imaging quality full chip verification for yield improvement

Qing Yang, CongShu Zhou, ShyueFong Quek, Mark Lu, YeeMei Foong, JianHong Qiu, Taksh Pandey, Russell Dover

Proceedings Volume 8683, 868326 (2013) https://doi.org/10.1117/12.2010661

KEYWORDS: Image quality, Image processing, Optical proximity correction, Semiconducting wafers, Etching, Metals, Resolution enhancement technologies, Photomasks, Nanoimprint lithography, Image enhancement

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Basic image intensity parameters, like maximum and minimum intensity values (Imin and Imax), image logarithm slope (ILS), normalized image logarithm slope (NILS) and mask error enhancement factor (MEEF) , are well known as indexes of photolithography imaging quality. For full chip verification, hotspot detection is typically based on threshold values for line pinching or bridging. For image intensity parameters it is generally harder to quantify an absolute value to define where the process limit will occur, and at which process stage; lithography, etch or post- CMP. However it is easy to conclude that hot spots captured by image intensity parameters are more susceptible to process variation and very likely to impact yield. In addition these image intensity hot spots can be missed by using resist model verification because the resist model normally is calibrated by the wafer data on a single resist plane and is an empirical model which is trying to fit the resist critical dimension by some mathematic algorithm with combining optical calculation. Also at resolution enhancement technology (RET) development stage, full chip imaging quality check is also a method to qualify RET solution, like Optical Proximity Correct (OPC) performance. To add full chip verification using image intensity parameters is also not as costly as adding one more resist model simulation. From a foundry yield improvement and cost saving perspective, it is valuable to quantify the imaging quality to find design hot spots to correctly define the inline process control margin. This paper studies the correlation between image intensity parameters and process weakness or catastrophic hard failures at different process stages. It also demonstrated how OPC solution can improve full chip image intensity parameters. Rigorous 3D resist profile simulation across the full height of the resist stack was also performed to identify a correlation to the image intensity parameter. A methodology of post-OPC full chip verification is proposed for improving OPC quality at RET development stage and for inline process control and yield improvement at production stage.

Proceedings Article | 8 November 2012 Paper

Novel customized manufacturable DFM solutions

Mark Lu, Cong-shu Zhou, Yi Tian, Soo Muay Goh, Shyue-Fong Quek, Hein-Mun Lam, Jian Zhang

Proceedings Volume 8522, 852223 (2012) https://doi.org/10.1117/12.964400

KEYWORDS: Design for manufacturing, Manufacturing, Metals, Yield improvement, Resistors, Semiconducting wafers, Optical lithography, Silicon, Databases, Photomasks

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Proceedings Article | 21 November 2007 Paper

Slope-integrated methodology for OPC model calibration

Liang Zhu, Mark Lu, Dion King, Yili Gu, Steve Yang, Gensheng Gao

Proceedings Volume 6827, 682725 (2007) https://doi.org/10.1117/12.755663

KEYWORDS: Optical proximity correction, Data modeling, Calibration, Scanning electron microscopy, Metrology, Time metrology, Critical dimension metrology, Statistical modeling, Model-based design, Systems modeling

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Proceedings Article | 14 November 2007 Paper

Mask calibration dominated methodology for OPC matching

Liang Zhu, Mark Lu, Dion King, Yili Gu, Steve Yang, Lawrence Melvin

Proceedings Volume 6730, 67304D (2007) https://doi.org/10.1117/12.742173

KEYWORDS: Photomasks, Optical proximity correction, Calibration, Data modeling, Manufacturing, Semiconducting wafers, Metrology, Critical dimension metrology, Performance modeling, Databases

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Proceedings Article | 26 March 2007 Paper

Distributed model calibration using Levenberg-Marquardt algorithm

Mark Lu, Liang Zhu, Li Ling, Gary Zhang, Walter Chan, Xin Zhou

Proceedings Volume 6520, 65203C (2007) https://doi.org/10.1117/12.711564

KEYWORDS: Process modeling, Calibration, Computing systems, Distributed computing, Data modeling, Lithography, Semiconductors, Optimization (mathematics), Immersion lithography, Numerical stability

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Proceedings Article | 9 June 2006 Paper

Improving model-based optical proximity correction accuracy using improved process data generation

Mark Lu, Dion King, Curtis Liang, Lawrence Melvin

Proceedings Volume 6149, 61490U (2006) https://doi.org/10.1117/12.674217

KEYWORDS: Photomasks, Data modeling, Optical proximity correction, Model-based design, Process modeling, Reticles, Inspection, Data processing, Critical dimension metrology, Semiconducting wafers

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Proceedings Article | 14 March 2006 Paper

Lithography window check before mask tape-out in sub-0.18um technology

Mark Lu, Dion King, Flora Li, Zhibiao Mao, Curtis Liang, Lawrence Melvin

Proceedings Volume 6156, 61560X (2006) https://doi.org/10.1117/12.655851

KEYWORDS: Photomasks, Process modeling, Lithography, Oxides, Optical proximity correction, Manufacturing, Optical lithography, Resistance, Scanning electron microscopy, Semiconductors

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Proceedings Article | 9 November 2005 Paper

Off-target model based OPC

Mark Lu, Curtis Liang, Dion King, Lawrence Melvin III

Proceedings Volume 5992, 599257 (2005) https://doi.org/10.1117/12.633116

KEYWORDS: Data modeling, Model-based design, Optical proximity correction, Process modeling, Semiconducting wafers, Data processing, Thin films, Photomasks, Light wave propagation, Manufacturing

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Showing 5 of 8 publications

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