Paper
13 March 2012 A study of vertical lithography for high-density 3D structures
Shin-Ichiro Hirai, Nobuyuki Saito, Yoshio Goto, Hiromi Suda, Ken-Ichiro Mori, Seiya Miura
Author Affiliations +
Abstract
3D stacking technology using TSVs, as well as linewidth shrinking, is crucial for future progress in semiconductor devices. A new i-line exposure tool, the FPA-5510iV, has been developed which provides the functions necessary for implementing TSV processes. This paper reports on Canon's commitment to make advanced TSV processes a reality.
© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Shin-Ichiro Hirai, Nobuyuki Saito, Yoshio Goto, Hiromi Suda, Ken-Ichiro Mori, and Seiya Miura "A study of vertical lithography for high-density 3D structures", Proc. SPIE 8326, Optical Microlithography XXV, 83261E (13 March 2012); https://doi.org/10.1117/12.917877
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CITATIONS
Cited by 3 scholarly publications.
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KEYWORDS
Semiconducting wafers

Plating

Distortion

Silicon

Optical alignment

Semiconductors

Etching

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