Paper
12 April 2013 A study of vertical lithography for high-density 3D structures
Masaki Mizutani, Shin-Ichiro Hirai, Ichiro Koizumi, Ken-Ichiro Mori, Seiya Miura
Author Affiliations +
Abstract
In recent years, demand for high-density integration of semiconductor chips has steadily increased due to miniaturization and high-performance requirements of electronics including Smartphones and Tablet PCs. In addition to 3D integration using Through-Silicon Via (TSV) technology, 2.5D integration technology using silicon interposers has also become a hot topic. Canon has identified key challenges that must be solved for successful implementation of high-density integration technologies into mass production and to meet these challenges, Canon developed the FPA-5510iV i-line lithography tool (stepper) that is now in wide use at customer sites for their most challenging processes. In this paper, Canon will explain details of FPA-5510iV features that support high-density integration. Canon will also introduce additional challenges that must be solved to ensure the success of high-density integration technologies in mass production, as well as Canon efforts to solve the remaining challenges.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Masaki Mizutani, Shin-Ichiro Hirai, Ichiro Koizumi, Ken-Ichiro Mori, and Seiya Miura "A study of vertical lithography for high-density 3D structures", Proc. SPIE 8683, Optical Microlithography XXVI, 86831F (12 April 2013); https://doi.org/10.1117/12.2011340
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CITATIONS
Cited by 6 scholarly publications.
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KEYWORDS
Lithography

Semiconducting wafers

Silicon

Chemically amplified resists

Optical alignment

Photomasks

Critical dimension metrology

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