We report a 40 Gb/s photoreceiver based on vertical-illumination type Ge-on-Si photodetectors and a silica-based AWG
demultiplexer by employing 4-channel CWDM. The 60um-diameter Ge-on-Si photodetector arrays, grown on a bulk
silicon wafer by RPCVD and fabricated with CMOS-compatible process, have ~0.9 A/W responsivity with 13 GHz
bandwidth at λ ~ 1330nm. Ge-on-Si photodetector arrays are hybrid-integrated with TIA/LAs and directly-coupled to the
AWG. The low-cost FPCB-package based photoreceiver module shows 10.3 Gb/s × 4-channel interconnection with -11
~ -12.2 dBm sensitivity at a BER = 10-12.
Based on either a SOI wafer or a bulk-silicon wafer, we discuss silicon photonic devices and integrations for chip-level
optical interconnects. We present the low-voltage silicon PICs on a SOI wafer, where Si modulators and Ge-on-Si
photodetectors are monolithically-integrated for intra-chip or inter-chip interconnects over 40 Gb/s. For future chip-level
integration, the 50 Gb/s small-sized depletion-type MZ modulator with the vertically-dipped PN-depletion-junction
(VDJ) is also presented. We report vertical-illumination-type Ge photodetectors on bulk-silicon wafers, with high
performances up to 50 Gb/s. We present the bulk-silicon platform for practical implementation of chip-level
interconnects, and the performance of the photonic transceiver silicon chip.
We report the silicon photonic receivers based on the hybrid-integrated vertical-illumination-type germanium-on-silicon
photodetector and CMOS amplifier circuit, for optical interconnects. The high-speed vertical-illumination-type Ge-on-Si
photodetector is defined on a bulk-silicon wafer, and the CMOS amplifier chip was designed with 65nm ground rule.
The PCB-packaged 4 channel 25 Gb/s photoreceiver exhibits a resposivity of 0.68A/W. The sensitivity measured at a
BER of 10−12 is -8.3 dBm and -2.4dBm for 25Gb/s and 32Gb/s, respectively. The energy efficiency is 2.19 pJ/bit at 25
Gb/s. The single-channel butterfly-packaged photoreceiver exhibits the sensitivity of -11dBm for 25 Gb/s at a BER of
10−12. The energy efficiency is 2.67 pJ/bit at 25 Gb/s.
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