Paper
19 March 2015 "Fast" and "thick" e-beam resists exposed with multi-beam tool at 5 keV for implants and mature nodes: experimental and simulated model study
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Abstract
In addition to sub-20 nm technology nodes, multi-beam lithography at low-energy has also the capability to address mature CMOS technologies [130-45nm nodes] with high throughput and significant manufacturing costs reduction. It requires both “fast” resists for throughput gain and cost of ownership and “thick” resists matched with the current post-lithography processes such as etching and implant steps. We successfully demonstrated patterning of 45-130 nm nodes structures on different thick resists (up to 160 nm) with a 5 keV Mapper pre-alpha tool. In parallel, we developed a theoretical model to simulate 3D patterning showing good agreement with our experimental results.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Aurélien Fay, Ndeye Arame Thiam, Marie-Laure Cordini, Isabelle Servin, Christophe Constancias, Ludovic Lattard, and Laurent Pain ""Fast" and "thick" e-beam resists exposed with multi-beam tool at 5 keV for implants and mature nodes: experimental and simulated model study", Proc. SPIE 9423, Alternative Lithographic Technologies VII, 94231Q (19 March 2015); https://doi.org/10.1117/12.2085832
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KEYWORDS
Lithography

Electron beam lithography

Silicon

Point spread functions

Scanning electron microscopy

Critical dimension metrology

3D modeling

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