Paper
17 May 2013 Analysis of thermal vias in molded interconnect devices
Jörg Reitterer, Franz Fidler, Ferdinand Saint Julien-Wallsee, Maximilian Barth, Wolfgang Eberhardt, Ulrich Keßler, Heinz Kück, Ulrich Schmid
Author Affiliations +
Proceedings Volume 8763, Smart Sensors, Actuators, and MEMS VI; 87630B (2013) https://doi.org/10.1117/12.2017361
Event: SPIE Microtechnologies, 2013, Grenoble, France
Abstract
The ongoing miniaturization of micro-opto-electro-mechanical-systems requires compact multifunctional packaging solutions like offered by the three-dimensional MID (molded interconnect device) technology which combines integrated electronic circuitry and mechanical support structures directly into one compact housing. Due to the inherently large thermal resistance of thermoplastic MID substrate materials, temperature-sensitive applications require carefully arranged thermal vias in order to reduce the thermal resistance of the packaging effectively. This paper presents the analysis and optimization of various laser-drilled thermal via design parameters of MIDs including hole diameter, pitch, plating thickness of the Cu/Ni/Au metallization layers as well as the void level of the filling material inside the vias.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jörg Reitterer, Franz Fidler, Ferdinand Saint Julien-Wallsee, Maximilian Barth, Wolfgang Eberhardt, Ulrich Keßler, Heinz Kück, and Ulrich Schmid "Analysis of thermal vias in molded interconnect devices", Proc. SPIE 8763, Smart Sensors, Actuators, and MEMS VI, 87630B (17 May 2013); https://doi.org/10.1117/12.2017361
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KEYWORDS
Resistance

Plating

Copper

Thermal modeling

Nickel

Finite element methods

Gold

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