Paper
25 March 2010 The important challenge to extend spacer DP process towards 22nm and beyond
Kenichi Oyama, Eiichi Nishimura, Masato Kushibiki, Kazuhide Hasebe, Shigeru Nakajima, Hiroki Murakami, Arisa Hara, Shohei Yamauchi, Sakurako Natori, Kazuo Yabe, Tomohito Yamaji, Ryota Nakatsuji, Hidetami Yaegashi
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Abstract
Double patterning processes are techniques that can be used to form etching mask patterns for 32nm node and possibly for 22nm node as well. The self-aligned spacer process has drawn much attention as an effective means of enabling the formation of repetitive patterns. The self-aligned spacer process is now being used in actual device manufacturing, but it has many process steps driving up process cost while also assuming a 1D pattern. This paper demonstrates extensions of the self-aligned spacer process by an enhanced 2D positive spacer process and a newly developed spacer DP process using a 1D negative spacer.
© (2010) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Kenichi Oyama, Eiichi Nishimura, Masato Kushibiki, Kazuhide Hasebe, Shigeru Nakajima, Hiroki Murakami, Arisa Hara, Shohei Yamauchi, Sakurako Natori, Kazuo Yabe, Tomohito Yamaji, Ryota Nakatsuji, and Hidetami Yaegashi "The important challenge to extend spacer DP process towards 22nm and beyond", Proc. SPIE 7639, Advances in Resist Materials and Processing Technology XXVII, 763907 (25 March 2010); https://doi.org/10.1117/12.845970
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CITATIONS
Cited by 15 scholarly publications.
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KEYWORDS
Stationary wavelet transform

Double patterning technology

Etching

Silica

Lithography

Photomasks

Photoresist processing

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