Reducing CD-SEM measurement carryover effect for 193-nm resist processes using CEq

Haiqing Zhou; Chih-Yu Wang; Aaron Zuo; Joseph P. Pratt

doi:10.1117/12.473518

16 July 2002 Reducing CD-SEM measurement carryover effect for 193-nm resist processes using CEq

Haiqing Zhou, Chih-Yu Wang, Aaron Zuo, Joseph P. Pratt

Proceedings Volume 4689, Metrology, Inspection, and Process Control for Microlithography XVI; (2002) https://doi.org/10.1117/12.473518
Event: SPIE's 27th Annual International Symposium on Microlithography, 2002, Santa Clara, California, United States

Abstract

As device performance increases, the circuitry line-width has drastically reduced. The challenges for CD-SEM metrology are not only on getting precise measurements on smaller geometries but also reducing E-beam induced charging on new resist materials. A well-known later case is the 193 nm resist processes that are extremely sensitive to the electron beam dosing. In E-beam metrology, the incremental CD deviation due to repeated charging during measurement is termed as CD carryover. Most substrate materials will typically exhibit positive CD carryover; in which line-width will grow, while trench and hole sizes will shrink. However, 193 nm resist will exhibit negative CD carryover, in which line-width will shrink, while trench and hole features will grow. With optimized landing energy and beam current, this carryover can be reduced. However, the image contrast and resolution will typically suffer. In this paper, KLA-Tencor's CEq (Charging equalization) technique is presented to minimize negative CD carryover effect on patterned 193nm resist wafers. The study was carried out on hole, trench and line structures to characterize CEq technique. The results suggested that the CEq technique could minimize negative CD carryover, especially on the hole and trench photolithography process levels.

Citation Download Citation

Haiqing Zhou, Chih-Yu Wang, Aaron Zuo, and Joseph P. Pratt "Reducing CD-SEM measurement carryover effect for 193-nm resist processes using CEq", Proc. SPIE 4689, Metrology, Inspection, and Process Control for Microlithography XVI, (16 July 2002); https://doi.org/10.1117/12.473518

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KEYWORDS

Photoresist processing

Scanning electron microscopy

Metrology

Semiconducting wafers

Electron beams

Optical lithography

Image resolution

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