SMESH: an IO-computation balanced architecture for parallel implementations of convolution and morphological filters in real time

Tri CaoHuu; Cao-Huu Tuan

doi:10.1117/12.23602

1 November 1990 SMESH: an IO-computation balanced architecture for parallel implementations of convolution and morphological filters in real time

Tri CaoHuu, Cao-Huu Tuan

Author Affiliations +

Proceedings Volume 1350, Image Algebra and Morphological Image Processing; (1990) https://doi.org/10.1117/12.23602
Event: 34th Annual International Technical Symposium on Optical and Optoelectronic Applied Science and Engineering, 1990, San Diego, CA, United States

Abstract

A high-speed special purpose architecture is presented to implement convolution and morphological filters in real-time. The highly parallel pipelined architecture developed has the characteristics of both a systolic array and an augmented 2-D mesh connected computers. We refer to this hybrid architecture as a systolic mesh (SMESH). In contrast to previous work in this area which has the emphasized the computational aspects the SMESH architecture addresses both computation and TO issues. We exploit the systolic array approach to improve the computation execution time while using a special broadcast scheme to speed-up JO communication leading to an 10-computation balanced design. I.

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Tri CaoHuu and Cao-Huu Tuan "SMESH: an IO-computation balanced architecture for parallel implementations of convolution and morphological filters in real time", Proc. SPIE 1350, Image Algebra and Morphological Image Processing, (1 November 1990); https://doi.org/10.1117/12.23602

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