Wafer backside particles is one of the issues in the IC manufacturing process that has been extensively investigated through the past decades, especially on immersion systems. However, as the technology nodes continue to scale down and we are approaching the high NA EUV lithography era, backside contamination control remains to be very important. To anticipate these upcoming challenges, SCREEN has developed a sophisticated track-integrated backside cleaning (BSC) module on the DT-3000 system, which offers an advanced post-coating BSC solution before exposure. Together with imec and ASML, we investigate the potential of this unique BSC process to guarantee the lithographic performance of EUV material stacks. This is done by correlating the backside contamination with frontside patterning performance before and after minimizing the number of scanner-focus spots. With this approach, we try to identify, characterize, and eliminate potential backside defects that could cause not only yield loss, but also physically deteriorate the scanner wafer table (WT) and hence its lifetime.
|