Laser is another major invention of mankind since the 20th century, after atomic energy, computers, and semiconductors. Laser has the characteristics of high brightness, high direction, high monochrome and high incoality, which makes laser detection become one of the main detection systems for short-range target, and is widely used in military and civilian fields. In the military aspect, laser detection and identification of targets is a key technology of laser short-range detection. Laser detection can improve the hit probability to the target such as tank ,because it can provide accurate distance data for gun fire, detection and so on; in civilian use , Laser ranging is a key technology in 3D laser scanning. Improving the accuracy of laser ranging is beneficial to 3D reconstruction and point cloud data acquisition. Therefore, it is important to improve the performance of the range circuit. In order to improve the range measurement accuracy of pulse laser, a pulse laser range measurement receiver circuit is designed. Based on the operating conditions of photoelectric avalanche tube (APD), this paper analyzes the main performance parameters such as APD peak wavelength, minimum detection power, sensitivity, reaction time. APD500-9T has been selected as the photodetector, The voltage feedback APD bias circuit based on TPS40210 has been designed, which provides stable operating voltage for APD. This receiver circuit analyzes the input capacitor and GBP of the op-amp, OPA657 was selected as the amplifier of the amplification circuit and a reasonable circuit structure has been designed.The circuit model was built and the functional simulation has been performed in Multisim. Finally, through experimental verification, the highvoltage bias circuit can produce 95V high-voltage, meeting the APD500-9T operation requirements. The receiver circuit can fully receive the echo signal.
High precision time measurement technology is the basis of many scientific applications. It plays an important role in radar, sonar, laser ranging, particle physics and other advanced scientific fields. Meanwhile, the ability of high-precision time measurement is also an important factor limiting the development of these fields. Time to digital conversion (TDC) is a commonly used time interval measurement method, which is widely used in the above-mentioned advanced areas. This paper presents a new TDC design method based on the delay chain structure, and the measurement accuracy is further improved by the combination of rough and exquisite counting. The theoretical basis of the TDC is described. The calculation formula of the total time to be measured is given. Then, by combining the start and the stop signal reasonably, the time of gate signal is within an acceptable range, which reduces the instability of the signal and the number of input signal sources. The designed TDC achieves excellent delay uniformity and stability through the reasonable layout and routing of Carry4 delay chain module in FPGA. In addition, in the design of latch unit, a two-stage latch unit is designed according to the mean time between failures (MTBF) theorem, which ensures the consistency of delay and the correctness of timing, avoids the generation of metastable state, and improves the timing accuracy. Finally, in order to verify the performance of the proposed TDC design scheme, reasonable post simulation and board level verification are conducted under different clock frequencies. The verification results show that the maximum mean error of TDC is 3.99ps and the minimum is 2.82ps.
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