This paper presents data obtained in developing a process using 193 nm lithography and the RELACS contact hole shrink technique. For the line/space levels, process windows showing resist performance using chrome on glass masks are presented. Data showing feature size linearity and the requirements for optical proximity correction (OPC) are presented. Some of the OPC trends observed are discussed and compared to results obtained using 248 nm lithography. Image shortening data also compares the results obtained in 193 and 248 lithography. Etch results for the new 193 resists are given and show the etch resistance of this relatively new class of photoresist materials. For contact hole and via levels, results using 193 lithography and COG masks show the importance of the mask error enhancement factor (MEEF), print bias and resolution. Due to the relative immaturity and performance of contact hole resists for 193 lithography, Clariant's RELACS process was investigated with 248 nm resists. In this process contact holes are printed larger than required and then reduced to the desired size by a chemical shrink process. Results obtained with 248 lithography using state of the art resists and phase shift masks are discussed. It was found that 140 nm contact holes with at least 0.5 micrometer depth of focus could be obtained. Cross sections and process windows are shown.
Silicon-containing bilayer thin-film imaging resists versus single layer resists for a variety of different mask types, from both a focus-expose window, etch selectivity, and process integration perspective are examined. Comparable lithographic performance is found for 248 nm single layer and bilayer resists for several mask levels including: a 135 nm dense contact/deep trench mask level, a 150 and 125 nm equal line space mask printed over trench topography, and dual damascene mask levels with both vias and line levels. The bilayer scheme is shown to significantly relax the dielectric to resist etch selectivity constraint for the case of a dense contact or trench hardmask level, where high aspect ratio dielectric features are required. Only a bilayer resist scheme in combination with a transfer etch process enables the line/space pattern transfer from the imaging layer to the bottom of a trench with a combined aspect ratio > 10. When the single layer resist depth of focus window is limited by both the topography and variations in the underlying dielectric stack thickness, as is the case for the dual damascene via and line levels, bilayer resist is shown to be a practical alternative.
Semiconductor processing tools that use a plasma to etch polysilicon or oxides produce residue polymers that build up on the exposed surfaces of the processing chamber. These residues are generally stressed and with time can cause flaking onto wafers resulting in yield loss. Currently, residue buildup is not monitored, and chambers are cleaned at regular intervals resulting in excess downtime for the tool. In addition, knowledge of the residue buildup rate and index of refraction is useful in determining the state of health of the chamber process. We have developed a novel optical fiber-based robust sensor that allows measurement of the residue polymer buildup while not affecting the plasma process.
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