Mr. Shen-Hung Chen Profile

Shen-Hung Chen

at United Microelectronic Corp

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Proceedings Article | 9 September 2013 Paper

In-die mask registration measurement on 28nm-node and beyond

Shen Hung Chen, Yung Feng Cheng, Ming Jui Chen

Proceedings Volume 8880, 88801O (2013) https://doi.org/10.1117/12.2025462

KEYWORDS: Image registration, Photomasks, Semiconducting wafers, Diffusion, Critical dimension metrology, Overlay metrology, Line width roughness, Lithography, Double patterning technology, Manganese

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As semiconductor go to smaller node, the critical dimension (CD) of process become more and more small. For lithography, RET (Resolution Enhancement Technology) applications can be used for wafer printing of smaller CD/pitch on 28nm node and beyond. SMO (Source Mask Optimization), DPT (Double Patterning Technology) and SADP (Self-Align Double Patterning) can provide lower k1 value for lithography. In another way, image placement error and overlay control also become more and more important for smaller chip size (advanced node). Mask registration (image placement error) and mask overlay are important factors to affect wafer overlay control/performance especially for DPT or SADP. In traditional method, the designed registration marks (cross type, square type) with larger CD were put into scribe-line of mask frame for registration and overlay measurement. However, these patterns are far way from real patterns. It does not show the registration of real pattern directly and is not a convincing method. In this study, the in-die (in-chip) registration measurement is introduced. We extract the dummy patterns that are close to main pattern from post-OPC (Optical Proximity Correction) gds by our desired rule and choose the patterns that distribute over whole mask uniformly. The convergence test shows 100 points measurement has a reliable result.

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