Proceedings Article | 18 July 2014
KEYWORDS: Reflectivity, Computing systems, Computer architecture, Operating systems, Clocks, Software frameworks, Large telescopes, Interferometers, Telescopes, Bridges
Several high frequency loops are required to run the VLTI (Very Large Telescope Interferometer) 2, e.g. for fringe
tracking11, 5, angle tracking, vibration cancellation, data capture. All these loops rely on low latency real time computers based on the VME bus, Motorola PowerPC14 hardware architecture. In this context, one highly demanding application in terms of cycle time, latency and data transfer volume is the VLTI centralized recording facility, so called, RMN
recorder1 (Reflective Memory Recorder). This application captures and transfers data flowing through the distributed
memory of the system in real time. Some of the VLTI data producers are running with frequencies up to 8 KHz. With the
evolution from first generation instruments like MIDI3, PRIMA5, and AMBER4 which use one or two baselines, to second generation instruments like MATISSE10 and GRAVITY9 which will use all six baselines simultaneously, the quantity of signals has increased by, at least, a factor of six. This has led to a significant overload of the RMN recorder1 which has reached the natural limits imposed by the underlying hardware. At the same time, new, more powerful computers, based on the Intel multicore families of CPUs and PCI buses have become available. With the purpose of improving the performance of the RMN recorder1 application and in order to make it capable of coping with the
demands of the new generation instruments, a slightly modified implementation has been developed and integrated into
an Intel based multicore computer15 running the VxWorks17 real time operating system. The core of the application is based on the standard VLT software framework for instruments13. The real time task reads from the reflective memory using the onboard DMA access12 and captured data is transferred to the outside world via a TCP socket on a dedicated Ethernet connection. The diversity of the software and hardware that are involved makes this application suitable as a benchmarking platform. A quantitative comparison between the two implementations (PowerPC14 and Intel Multicore20, 15) under different workloads will be presented. In particular, the interrupt handling, the reflective memory access, DMA readout, and TCP stack performances will be compared. To test the limits of the new hardware, the separation, on the different cores, of each of the basic tasks, as the readout, the network transfer, etc, were implemented and throughput reevaluated. The result shows that the RMN recorder1 can extend its operational range from 10 KHz to above 16 KHz by moving from a PowerPC14 to Intel Multicore20, 15. In general, a reduction of latencies and computational delays of could be expected by upgrading applications to Intel Multicore20, 15 architectures.
