Silicon Photonics taps on the volume manufacturing capability of traditional silicon manufacturing techniques, to
provide dramatic cost reduction for various application domains employing optical communications technology. In
addition, an important new application domain would be the implementation of high bandwidth optical interconnects in
and around CPUs. Besides volume manufacturability, Silicon Photonics also allows the monolithic integration of
multiple optical components on the same wafer to realize highly compact photonic integrated circuits (PICs), in which
functional complexity can be increased for little additional cost. An important pre-requisite for Si PICs is a device library
in which the devices are compatibly developed around a common SOI platform. A device library comprising passive and
active components was built, which includes light guiding components, wavelength-division-multiplexing (WDM)
components, switches, carrier-based Si modulators and electro-absorption based Ge/Si modulators, Ge/Si photodiodes
and avalanche photodiodes, as well as light emitting devices. By integrating various library devices, PIC test vehicles
such as monolithic PON transceivers and DWDM receivers have been demonstrated. A challenge with Si PICs lies with
the coupling of light into and out of the sub-micrometer Si waveguides. The mode size mismatch of optical fibers and Si
waveguides was addressed by developing a monolithically integrated multi-stage mode converter which offers low loss
together with relaxed fiber-to-waveguide alignment tolerances. An active assembly platform using MEMS technology
was also developed to actively align and focus light from bonded lasers into waveguides.
In this paper, we report our design and fabrication approach towards realizing a monolithic integration of Ge
photodetector and Si CMOS circuits on common SOI platform for integrated photonic applications. The approach, based
on the Ge-on-SOI technology, enables the realization of high sensitivity and low noise photodetector that is capable of
performing efficient optical-to-electrical encoding in the near-infrared wavelengths regime. When operated at a bias of
-1.0V, a vertical PIN detector achieved a lower Idark of ~0.57μA as compared to a lateral PIN detector, a value that is
below the typical ~1μA upper limit acceptable for high speed receiver design. Very high responsivity of ~0.92A/W was
obtained in both detector designs for a wavelength of 1550nm, which corresponds to a quantum efficiency of ~73%.
Impulse response measurements showed that a vertical PIN photodetector gives rise to a smaller FWHM of ~24.4ps,
which corresponds to a -3dB bandwidth of ~11.3GHz where RC time delay is known to be the dominant factor limiting
the speed performance. Eye patterns (PRBS 27-1) measurement further confirms the achievement of high speed and low
noise photodetection at a bit-rate of 8.5Gb/s. In addition, we evaluate the DC characteristics of the monolithically
fabricated Si CMOS inverter circuit. Excellent transfer and output characteristics were achieved by the integrated CMOS
inverter circuits in addition to the well behaved logic functions. We also assess the impact of the additional thermal
budget introduced by the Ge epitaxy growth on the threshold voltage variation of the short channel CMOS transistors
and discuss the issues and potential for the seamless integration of electronic and photonic integrated circuits.
By tapping on the volume manufacturing capability of the Si CMOS platform, Si photonics can potentially offer costeffective
yet high performance optical interface solutions, and will be especially important in short reach applications.
Numerous challenges lie ahead for monolithically integrated Si photonics. There are process integration and thermal
budget constraints when monolithically integrating individual Si photonic components such as modulators and
photodetectors, and also CMOS on the same chip. In this work, the CMOS-compatible monolithic integration of Si
modulators and Ge-on-Si photodetectors on the same wafer is demonstrated and the details of performance optimization
are also discussed. Besides process compatibility, the modulators and photodetectors should possess high efficiency and
the ability to operate at low power supply voltages. The methods to achieve this are also described. The carrier depletion
type Si modulators achieved high modulation efficiency and speed (Vπ.Lπ = 2.6 V.cm, 10 Gbps). At 10 Gbps, an
extinction ratio of 6 dB was measured in a modulator with 2-mm-long phase-shifters using single-ended drive (VRF = 5
Vpp). Low voltage operation at 3.125 Gbps was also demonstrated using differential drive, which allowed the drive
voltage to be reduced to only 1 V (VRF = 1 Vpp). Ge-on-Si photodetectors were integrated by using a selective epitaxial
Ge growth process. The performance of such photodetectors was evaluated in terms of speed, responsivity and dark
current for different temperatures and operating voltages. It is shown that introducing a low thermal budget post-epitaxy
anneal improves the performance of the Ge photodetectors, resulting in significantly improved dark current. The
responsivity and speed in the low voltage regime are also enhanced, which enhances low voltage or even short-circuit
(VBias = 0 V) operation.
An electro-absorption (EA) modulator holds distinct advantages over the silicon Mach-Zehnder interferometer
(MZI) modulator by having lower energy consumption, a smaller footprint on-chip, and a potentially higher modulation
speed. These are crucial for efficient encoding of optical signals in silicon photonics circuits. Furthermore, the
development of a Group IV-based (i.e. silicon- or germanium-based) EA modulator allows compatibility with standard
complementary metal-oxide-semiconductor (CMOS) processing. In this work, we demonstrate a novel evanescent
germanium (Ge) EA modulator structure. A lateral electric field is employed in the Ge rib to enhance absorption via the
Frank-Keldysh effect. This shifts the absorption edge significantly with applied bias for wavelengths beyond 1600 nm.
A peak extinction ratio of ~15 dB at 1600 nm could be achieved for a <3 V dynamic voltage swing from a 20 μm
modulator. The impact of device dimensions and design structure on optical modulation and insertion loss are also
investigated. In addition, monolithic integration of waveguided Ge-based modulator and photodetector can be simplified
with our proposed EA modulator structure. The results from this work can make a low power and high speed Ge-based
EA modulator viable for future silicon photonics applications.
In this paper, we presented a high performance monolithic Si DWDM receiver comprising a 1×32 Si-based AWG filter
and a high speed waveguided Ge-on-Si photodetectors array on silicon-on-insulator platform. The Si-based AWG has
200 GHz channel spacing and its optical adjacent crosstalk performance is more than 18 dB. Each Ge-on-Si
photodetector has 10 GHz bandwidth; and can transmit at least 10 Gbps data rate. So, the aggregated data rate of the
DWDM receiver is at least 320 GHz. At a BER of 1 × 10-11, the DWDM receiver showed an optical input sensitivity
between -16 dBm and -19 dBm for all 32 channels in Lband. This first demonstration indicates the feasibility and
potential of manufacturing low cost silicon DWDM receivers for terabit data communications. The size of entire receiver
is 1.5×1.0 mm2.
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