The steady move towards feature sizes ever deeper in the subwavelength regime has necessitated the increased use of aggressive resolution enhancement techniques (RET) in optical lithography. The use of ever more complex RET methods including strong phase shift masks and complex OPC has led to an alarming increase in the cost of photomasks, which cannot be amortized by many types of semiconductor applications. This paper reviews an alternative RET approach, dense template phase shift lithography, that can substantially reduce the cost of optical RET. The use of simple dense grating templates can also eliminate serious problems encountered in subwavelength lithography including optical proximity and spatial frequency effects. We show that, despite additional design rule restrictions and the use of multiple exposures per critical level, this type of lithography approach can make economic sense depending on the number of wafers produced per critical photomask.
This article presents the results of a collaborative effort between Molecular Imprints, Inc. (MII) and Photronics, Inc. to develop a baseline process for fabricating Step and Flash Imprint Lithography (S-FIL) templates that are compatible with lithography tools being developed by MII. S-FIL is a replication technique with sub-50nm resolution capability that has the potential to lead to a low cost, high throughput process. Template fabrication results and S-FIL patterning results on 200mm wafers are presented.
Gray scale lithography is becoming a popular technique for producing three-dimensional structures needed in fabricating photonics and MEMS devices. The structures are printed using a variable transmission mask to yield the required continuous tone intensity during image formation. In binary half tone imaging (i.e., BHT), the transmission through the mask is adjusted by varying the open area of sub-patterns. Design rules, fabrication tradeoffs and a layout methodology employing a novel primitive cell to aid in constructing the BHT masks are discussed Simulation is leveraged to tie the BHT design with expected imaging results. The overall process is exercised by fabricating a specific grayscale design for use in a photonic application. The BHT mask approach to gray scale lithography is a viable method to fabricate three-dimensional images offering MEMS and photonics communities a cost effective alternative to gray scale masks which rely on specialty materials and films.
The rise of low-k1 optical lithography in integrated circuit manufacturing has introduced new questions concerning the physical and practical limits of particular subwavelength resolution-enhanced imaging approaches. For a given application, trade-offs between mask complexity, design cycle time, process latitude and process throughput must be well understood. It has recently been shown that a dense-only phase shifting mask (PSM) approach can be applied to technology nodes approaching the physical limits of strong PSM with no proximity effects. Such an approach offers the benefits of reduced mask complexity and design cycle time, at the expense of decreased process throughput and limited design flexibility. In particular, dense-only methods offer k1<0.3, thus enabling 90 nm node lithography with high-numerical aperture 248 nm exposure systems. We present the results of experiments, simulations, and analysis designed to explore the trade-offs inherent in dense-only phase shift lithography. Gate and contact patterns corresponding to various fully scaled circuits are presented, and the relationship between process complexity and design latitude is discussed. Particular attention is given to approaches for obtaining gate features in both the horizontal and vertical orientation. Since semiconductor investment is dependent on cost amortization, the applicability of these methods is also considered in terms of production volume.
Image placement errors and their effect on process latitude are a remaining issue in the development of strong phase shift mask technology. In this work, we will review the various causes of image placement error for strong phase shift imaging, including both mask and stepper lens contributions. We will also review various methods of minimizing these image shift errors including the mask fabrication process, stepper lens improvement, and proper design of the lithography process. We will also present experimental results showing how aerial image asymmetry effects can be minimized by the use of an optimized resist process.
The rise of low-k1 optical lithography in IC manufacturing has introduced new questions concerning the physical and practical limits of particular sub-wavelength resoltuion-enhanced imaging approaches. For a given application tradeoffs between mask complexity design cycle time, process latitude and process throughput must be well understood. It has recently been shown that a dense-only PSM approach can be applied to technology nodes approaching the physical limits of strong PSM with no proximity effects. Such an approach offers the benefits of reduced mask complexity and design cycle time, at the expense of decreased process throughput and limited design flexibility. In particular, dense-only methods offer k1 < 0.3, thus enabling 90-nm node lithography with high-NA 248 nm exposure systems. We presents the results of experiments, simulations, and analysis designed to explore the tradeoffs inherent in dense-only phase shift lithography. Gate and contact patterns corresponding to various fully scaled circuits are presented, and the relationship between process complexity and design latitude is discussed. Particular attention is given to approaches for obtaining gate features in both the horizontal and vertical orientation. Since semiconductor investment is dependent on cost amortization, the applicability of these methods is also considered in terms of production volume.
This paper presents the results of a joint development effort between Canon USA, Inc. and Photronics, Inc. on 150nm contact hole application. A double exposure technique, Canon's IDEAL technique, is used to achieve the very small dense contact hole and isolated contact hole simultaneously. Canon's IDEAL exposure technique has shown, through numerous documented investigations to be beneficial for extending the current lithography tool life with regards to line patterns. However, it is also now equally important to evaluate IDEAL's advantages for contact holes. We look to apply the IDEAL technique to contact holes by using a Hole-shaped alternating Phase Shift Mask for the grid and a binary mask for trimming. This experiment was performed on a Canon FPA- 3000EX6 5X stepper with maximum NA0.65, using JSR TMX1260Y 300nm thick resist. All masks were made by Photronics. Since image intensity imbalances of Hole shaped alt-PSMs were too large to generate a perfect grid, we exposed twice with the same Hole-shaped alt-PSM reticle. The second exposure was shifted to combine 0 degree and 180-degree space, thereby creating a well-balanced grid. Subsequently, we used a binary mask for trimming. Through this method, 0.15 micrometers dense holes and 0.15 micrometers isolated holes with simple reticle bias were resolved simultaneously, and over 0.6 micrometers common DOF was obtained. Due to the high accuracy alignment between the PSM hole mask and binary mask from this experiment, double and triple exposure schemes can be used in actual production. Based on these experimental result, we also confirmed that the IDEAL technique allows fora 50nm combination error of stage stepping and reticle alignment without including significant CD error. A well- balanced grid can be generated using the vertical line PSM and horizontal line PSM, by minimizing image intensity imbalances due to PSM structures, however, the three-reticle application may prove prohibitive due to the increase in reticle cost.
The application of strong phase shift masks (PSM's) such as AAPSM and Chromeless using KrF 248-nm lithography is increasingly in demand for production of advanced devices at the 130 nm node and below. Implementation of dual exposure PSM technology is becoming widely accepted as a method to achieve sub-wavelength gate and contact layer resolution for microprocessors, DRAM and thin film heads. This requires a stable and repeatable phase-shift mask process that will perform for the wafer lithographer and is manufacturable using today's leading edge photomask fabrication methods. The focus of this study is the characterization of the photomask quartz etch process. The effect of the photomask's phase depth control and the quartz etch CD control will be examined. A comprehensive mask metrology study will be supplemented by lithography process latitude data, both simulation and experimentally based. The effect of fabricating the photomask quartz trenches using either resist or chrome defined etch masks will also be studied as well as the impact on lithography process latitude. A key goal of this study is the determination of a realistic specification for the quartz etch process required for leading- edge phase-shift photomasks.
We present results looking into the feasibility of 100-nm Node imaging using KrF, 248-nm, exposure technology. This possibility is not currently envisioned by the 1999 ITRS Roadmap which lists 5 possible options for this 2005 Node, not including KrF. We show that double-exposure strong phase- shift, combined with two mask OPC, is capable of correcting the significant proximity effects present for 100-nm Node imaging at these low k1 factors. We also introduce a new PSM Paradigm, dubbed 'GRATEFUL,' that can image aggressive 100-nm Node features without using OPC. This is achieved by utilizing an optimized 'dense-only' imaging approach. The method also allows the re-use of a single PSM for multiple levels and designs, thus addressing the mask cost and turnaround time issues of concern in PSM technology.
Achieving CD control for sub-100 nm processes will be challenging due to the low-k1 regime that optical patterning approaches will be required to work in. New challenges are expected to arise related to new lithography tools, photoresists, reticle types, and in some cases multiple exposures per layer. This work examines the intra-field CD variations for a range of sub-100 nm resist features patterned by chromeless phase-shift 248-nm lithography. One significant advantage of this patterning technique is that the resist CD's are a function of the exposure dose. This provides the ability to examine the CD variations of a range of linewidths in a single experiment without relying on reticle pattern scaling to determine the linewidth printed on the wafer. In addition to exploring CD control vs feature size, we also examine the full-field depth of focus for these features.
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