3D heterogeneous integration is an evolving segment in integrated circuit development and advanced packaging to drive More than Moore (MtM) chip scaling. Heterogeneous integration allows IC manufacturers to stack and integrate more silicon devices in a single package, increasing the transistor density and product performance. Product designers seek higher bandwidth, increased power, improved signal integrity, more flexible designs (mix/match different chip functions, sizes, and technology nodes), and lower overall costs. The 3D heterogeneous integration roadmap shows a decrease in the bonding bumps/pads pitch to a sub-micrometer level, enabling a higher bump I/O density. Key process development activity is occurring in the wafer-to-wafer (W2W) bonding process to reduce interconnect pitch to small values. In the W2W process, a wafer bonder is used to align and bond two whole wafers. To successfully unite these two bond surfaces with a very small pitch, tight control of the bond pad alignment is required to ensure the copper pads line up properly before being bonded, driving an increased need for overlay metrology precision and die-bonder control. The bonded wafers are subsequently cut up into stacked chips using a dicing process and then undergo testing and further packaging. Advanced processing control (APC) for W2W hybrid bonding is an important factor in fulfilling the target on-product overlay (OPO) via litho inputs, in-plane distortion (IPD), overlay (OVL) and bonder correction knobs. This work will evaluate the various aspects impacting OPO, including the pre and post-bonding error budget.
Sub-2nm On Product Overlay (OPO), scribe line width reduction, and high-order scanner correctibles are driving innovative overlay (OVL) targets. One promising new imaging-based overlay (IBO) OVL target to address such challenging trends in multiple semiconductor segments is a small pitch AIM (sAIM). sAIM is in essence an IBO target with grating (previous layer) beside grating (current layer) which could be placed in a few layouts: square, rectangular, and Mosaic. In this work, we will present the sAIM operational concept and performance including Total Measurement Uncertainty (TMU), residuals, and accuracy (ADI on-target offset vs. ACI on-device or target), which is often referred to as Non-Zero Offset (NZO).
The semiconductor industry continually evaluates new materials to improve the process or minimize product variability, which could create measurement challenges for metrology tools in the visible and near-infrared (NIR) spectrum. Opaque materials (i.e., ‘hard masks,’ ‘HM’) are placed in between the resist (i.e., inner layer) and process (i.e., outer layer or underlying layer) in 3D NAND or DRAM processes to control the etch of high aspect-ratio structures to maximize product yield. However, longer wavelengths (e.g., IR WL) may be required to penetrate and properly view the underlying process layer and measure OVL accurately. In this work, longer wavelengths will be evaluated to improve measurement accuracy and keep up with the increasing use of opaque materials, which is expected to increase in future nodes. We will review the benefits of IR WL to OVL measurement accuracy by quantifying the OVL residuals, contrast precision (CP), and total measurement uncertainty (TMU) on multiple DRAM and 3D NAND critical layers.
As 3D NAND devices increase memory density by adding layers, scaling and increasing bits-per-cell, new overlay (OVL) metrology challenges arise. On product overlay (OPO) may decrease for critical thick layers such as thick deck-to-deck alignment, whereas high aspect ratio (Z-axis) structures introduce stress, tilt and deformation that require accurate and robust OVL measurements. Advanced imaging metrology (AIM®) targets, that consist of two side-byside periodic gratings in the previous and current layers, are typically used to measure OVL with Imaging Based Overlay (IBO) metrology systems. In this paper, we present a new approach that utilizes the Talbot effect in AIM to produce multiple contrast planes along the Z-axis, which enables a common focus position for both layers at a similar focus plane, resulting in improved measurement robustness. We will present Talbot effect theory, target design steps by metrology target design (MTD) simulator, actual measurement results on an advanced 3D NAND device and conclusions for such targets.
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