Mr. Ngoc V. Le Profile

Ngoc V. Le

Senior Process Engineer at Motorola Solutions Inc

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Author

Publications (5)

Proceedings Article | 15 March 2007 Paper

An electrical defectivity characterization of wafers imprinted with step and flash imprint lithography

W. Dauksher, N. Le, K. Gehoski, E. Ainley, K. Nordquist, N. Joshi

Proceedings Volume 6517, 651714 (2007) https://doi.org/10.1117/12.712376

KEYWORDS: Semiconducting wafers, Resistance, Lithography, Scanning electron microscopy, Etching, Wafer-level optics, Particles, Optical inspection, Manufacturing, Quartz

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Proceedings Article | 25 October 2006 Paper

Fabrication of a monolithically integrated multiple wavelength Fabry-Perot filter array using transparent etch stop layers for accurate wavelength determination

Diana Convey, Ngoc Le, Steven Smith, Paige Holm, Jeffrey Baker

Proceedings Volume 6378, 637815 (2006) https://doi.org/10.1117/12.684937

KEYWORDS: Etching, Fabry–Perot interferometers, Oxides, Mirrors, Reflectivity, Silicon, Dielectric filters, Optical filters, Digital filtering, Chromium

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Proceedings Article | 24 March 2006 Paper

Imprint technology: A potential low-cost solution for sub-45nm device applications

Ngoc Le, William Dauksher, Kathy Gehoski, Kevin Nordquist, Eric Ainley, Pawitter Mangat

Proceedings Volume 6151, 61512K (2006) https://doi.org/10.1117/12.657488

KEYWORDS: Etching, Lithography, Oxides, Critical dimension metrology, Nanoimprint lithography, Scanning electron microscopy, Semiconducting wafers, Printing, Silicon, Plasma

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Proceedings Article | 6 May 2005 Paper

Development of an etch-definable lift-off process for use with step and flash imprint lithography

Ngoc Le, Kathleen Gehoski, William Dauksher, Jeffrey Baker, Doug Resnick, Laura Dues

Proceedings Volume 5751, (2005) https://doi.org/10.1117/12.605932

KEYWORDS: Etching, Lithography, Oxides, Metals, Aluminum, Semiconducting wafers, Plasmas, Scanning electron microscopy, Silicon, Semiconductors

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Along with other Next Generation Lithography (NGL) methods, imprint lithography has been included on the International Roadmap for Semiconductors (ITRS) for the 32 nm node, predicted to be production-ready by 20131. Step and Flash Imprint Lithography (S-FIL) is one of the imprinting technologies being pursued due to its impressive imprinting capabilities, where imprinted features of less than 30 nm have been demonstrated. Unlike optical-based lithography, S-FIL uses techniques similar to that of contact printing, and thereby does not require complex and expensive optics and light sources to create images. Couple this with a reliable pattern transfer, and S-FIL could become a contender as a viable NGL technology. Similar to other imprint lithography systems, S-FIL printed features possess a residual layer several hundred angstroms thick, which requires a breakthrough etch prior to etching a subsequent layer. Of a greater concern, however, is the etch barrier used as the imaging layer for S-FIL. The present silicon content is limited to approximately nine percent, and the formulation is optimized for dispensing and achieving mechanical properties for the imprinting process. As a result, oxygen-based plasmas typically used for pattern transferring more conventional bi-layer structures are not compatible with the current S-FIL resist stack, and therefore pose a challenge from an etch perspective. The development of a recent etch process incorporating an ammonia-based plasma was a key enabler for pattern transfer, and ongoing development is being done to improve critical dimensions (CD). In this study, we examined a lift-off process using S-FIL. The material stacks with and without a "glue" layer will be discussed, and the challenges from imprinting to etch will be shared. Finally, the lift-off process will be used to demonstrate fabrication of a surface acoustic wave (SAW) device in addition to demonstrating patterning of a non-reactive metallization scheme such as Ti/Au.

Proceedings Article | 20 May 2004 Paper

Sub-80-nm contact hole patterning using Step and Flash Imprint Lithography

David Mancini, Ngoc Le, Kathleen Gehoski, Steven Young, William Dauksher, Kevin Nordquist, Douglas Resnick

Proceedings Volume 5374, (2004) https://doi.org/10.1117/12.537382

KEYWORDS: Etching, Lithography, Silicon, Critical dimension metrology, Semiconducting wafers, Scanning electron microscopy, Quartz, Oxides, Photomasks, Printing

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