With recent technology advancements of multi-beam mask writers, curvilinear masks can now be extended to advanced EUV lithography generations. Inverse lithography technology (ILT) is a curvilinear mask-friendly mask synthesis solution with superior quality but slower TAT than mainstream rule-based assist feature + OPC methods. To achieve ILT quality for full-chip layouts, a faster curvilinear ILT-based mask synthesis solution is desired. We present a hybrid curvilinear mask solution with ILT and curve OPC for full-chip EUV layers. Results of full-chip EUV in lithographic performance and runtime are compared among different solutions including traditional Manhattan OPC, curvilinear ILT, and hybrid machine learning (ML) ILT plus curve OPC. Another important factor of curvilinear mask advancement is data volume. We present our curve OPC solution with the cubic Bezier curve to control the data volume of curvilinear masks. The mask writing process is playing an increasingly important role in the overall manufacturing flow. Therefore, we also present an enhanced mask synthesis flow utilizing a mask error correction solution for curvilinear masks written by a multi-beam writer.
Machine Learning (ML) based technologies are actively being adopted in the computational lithography domain. ML-based methods have the potential to enhance the accuracy of predictive models, speed up the run-times of the mask optimization processes and produce consistent results compared with the other numerical methods. In this paper, we present the result of an ML-based ILT application to an advanced DRAM contact layer for both core and periphery region. In our ML ILT method, golden mask layouts are generated by ProteusTM ILT tool for the sampled target layouts to obtain reliable training inputs, which are then used to train a custom-designed Convolutional Neural Network (CNN). The trained CNN is plugged-in to the conventional ILT flow as an initial mask provider and the entire
The application of curvilinear masks for DUV lithography has demonstrated benefits over Manhattan masks for improved process window, mask consistency, sidelobe printing control and MRC. However, the prior high cost of using curvilinear masks has limited the usage to critical areas and prevented its broader adoption in production. With recent technology advancements, multi-beam mask writers are capable of meeting specifications of advanced patterning nodes, and curvilinear masks can now be extended to advanced EUV lithography generations. ILT is known for its advantage of creating a patterning-optimized curvilinear mask through field operations. It has been used to solve the most challenging lithography problems with superior quality. Computational costs have previously limited widespread ILT deployment to only the most advanced production mask synthesis flows. To create curvilinear masks for full-chip layout, a faster curvilinear OPC solution for less critical regions will be a valuable complimentary option to curvilinear ILT. In this paper, we will present a hybrid curvilinear mask solution with ILT and Curve OPC for full-chip EUV layers. Results of full-chip EUV in lithographic performance and runtime will be compared among different solutionsincluding traditional Manhattan OPC, Curvilinear ILT and hybrid machine learning (ML) ILT plus Curve OPC. Another important factor of curvilinear mask advancement is data volume. We will present our Curve OPC solution with Cubic Bezier curve to control the data volume of curvilinear masks. The mask write process is playing an increasingly important role in overall manufacturing flow. Therefore, we also present an extended mask synthesis flow utilizing a mask error correction (MEC) solution for curvilinear masks written by a multi-beam writer.
We provide background on differences between traditional and machine learning modeling. We then discuss how these differences impact the different validation needs of traditional and machine learning OPC compact models. We then provide multiple diverse examples of how machine learning OPC compact validation modeling can be appropriately validated both for modeling-specific production requirements such as model signal/contour accuracy, predictiveness, coverage and stability; and also general OPC mask synthesis requirements such as OPC/ILT stability, convergence, etc. Finally we conclude with thoughts on how machine learning modeling methods and their required validation methods are likely to evolve for future technology nodes.
Circuit design is driven to the physical limit, and thus patterns on a wafer suffer from serious distortion due to the optical proximity effect. Advanced computational methods have been recommended for photomask optimization to solve this problem. However, this entails extremely high computational costs leading to problems including lengthy run time and complex set-up processes. This study proposes a pixel-based learning method for an optimized photomask that can be used as an optimized mask predictor. Optimized masks are prepared by a commercial tool, and the feature vectors and target label values are extracted. Feature vectors are composed of partial signals that are also used in simulation and observed at the center of the pixels. The target label values are determined by the existence of mask polygons at the pixel locations. A single-hidden-layer artificial neural network (ANN) is trained to learn the optimized masks. A stochastic gradient method is adopted for training to handle about 2 million samples. The masks that are predicted by an ANN show averaged edge placement error of 1.3 nm, exceeding that of an optimized mask by 1.0 nm, and averaged process variation band of 4.8 nm, which is lower than that of the optimized mask by 0.1 nm.
Most approaches to model-based optical proximity correction (OPC) use an iterative algorithm to determine the optimum mask. Each iteration requires at least one simulation, which is the most time-consuming part of model-based OPC. As the layout becomes more complicated and the process conditions are driven to the physical limit, the required number of iterations increases dramatically. To overcome this problem, we propose a method to predict the OPC bias of layout segments with a single-hidden-layer neural network. The segments are characterized by length and based on intensities at the corresponding control points, and these features are used as input to the network, which is trained with an extreme learning machine. We obtain a best-error root mean square of 1.29 nm from training and test experiments for layout clips sampled from a random contact layer of a logic device. In addition, we reduced the iterations by 27.0% by initializing the biases in the trained network before performing the main iterations of the OPC algorithm.
Generally speaking, the models used in the optical proximity effect correction (OPC) can be divided into three parts,
mask part, optic part, and resist part. For the excellent quality of the OPC model, each part has to be described by the
first principles. However, OPC model can't take the all of the principles since it should cover the full chip level
calculation during the correction. Moreover, the calculation has to be done iteratively during the correction until the cost
function we want to minimize converges. Normally the optic part in OPC model is described with the sum of coherent
system (SOCS[1]) method. Thanks to this method we can calculate the aerial image so fast without the significant loss of
accuracy. As for the resist part, the first principle is too complex to implement in detail, so it is normally expressed in a
simple way, such as the approximation of the first principles, and the linear combinations of factors which is highly
correlated with the chemistries in the resist. The quality of this kind of the resist model depends on how well we train the
model through fitting to the empirical data. The most popular way of making the mask function is based on the
Kirchhoff's thin mask approximation. This method works well when the feature size on the mask is sufficiently large,
but as the line width of the semiconductor circuit becomes smaller, this method causes significant error due to the mask
topography effect. To consider the mask topography effect accurately, we have to use rigorous methods of calculating
the mask function, such as finite difference time domain (FDTD[2]) and rigorous coupled-wave analysis (RCWA[3]). But
these methods are too time-consuming to be used as a part of the OPC model. Until now many alternatives have been
suggested as the efficient way of considering the mask topography effect. Among them we focused on the boundary
layer model (BLM) in this paper. We mainly investigated the way of optimization of the parameters for the BLM since
the feasibility of the BLM has been investigated in many papers[4][5][6]. Instead of fitting the parameters to the wafer
critical dimensions (CD) directly, we tried to use the aerial image (AI) from the rigorous simulator with the
electromagnetic field (EMF) solver. Usually that kind of method is known as the staged modeling method. To see the
advantages of this method we conducted several experiments and observed the results comparing the method of fitting to
the wafer CD directly. Through the tests we could observe some remarkable results and confirmed that the staged
modeling had better performance in many ways.
For semiconductor IC manufacturing at sub-30nm and beyond, aggressive SRAFs are necessary to ensure sufficient
process window and yield. Models used for full chip Inverse Lithography Technology (ILT) or OPC with aggressive
SRAFs must predict both CDs and sidelobes accurately. Empirical models are traditionally designed to fit SEMmeasured
CDs, but may not extrapolate accurately enough for patterns not included in their calibration. This is
particularly important when using aggressive SRAFs, because adjusting an empirical parameter to improve fit to CDSEM
measurements of calibration patterns may worsen the model's ability to predict sidelobes reliably. Proper choice of
the physical phenomena to include in the model can improve its ability to predict sidelobes as well as CDs of critical
patterns on real design layouts. In the work presented here, we examine the effects of modeling certain chemical
processes in resist. We compare how a model used for ILT fits SEM CD measurements and predicts sidelobes for
patterns with aggressive SRAFs, with and without these physically-based modeling features. In addition to statistics
from fits to the calibration data, the comparison includes hot-spot checks performed with independent OPC verification
software, and SEM measurements of on-chip CD variation using masks created with ILT.
OPC models with and without thick mask effect (3D-mask effect) are compared in their prediction capabilities of actual
2D patterns. We give some examples in which thin-mask models fail to compensate the 3D-mask effect. The models
without 3D-mask effect show good model residual error, but fail to predict some critical CD tendencies. Rigorous
simulation predicts the observed CD tendencies, which confirms that the discrepancy really comes from 3D-mask effect.
As semiconductor manufacturing moves to 32nm and 22nm technology nodes with 193nm water immersion
lithography, the demand for more accurate OPC modeling is unprecedented to accommodate the diminishing
process margin. Among all the challenges, modeling the process of Chemically Amplified Resist (CAR) is a
difficult and critical one to overcome. The difficulty lies in the fact that it is an extremely complex physical and
chemical process. Although there are well-studied CAR process models, those are usually developed for TCAD
rigorous lithography simulators, making them unsuitable for OPC simulation tasks in view of their full-chip
capability at an acceptable turn-around time. In our recent endeavors, a simplified reaction-diffusion model capable
of full-chip simulation was investigated for simulating the Post-Exposure-Bake (PEB) step in a CAR process. This
model uses aerial image intensity and background base concentration as inputs along with a small number of
parameters to account for the diffusion and quenching of acid and base in the resist film. It is appropriate for OPC
models with regards to speed, accuracy and experimental tuning. Based on wafer measurement data, the parameters
can be regressed to optimize model prediction accuracy. This method has been tested to model numerous CAR
processes with wafer measurement data sets. Model residual of 1nm RMS and superior resist edge contour
predictions have been observed. Analysis has shown that the so-obtained resist models are separable from the effects
of optical system, i.e., the calibrated resist model with one illumination condition can be carried to a process with
different illumination conditions. It is shown that the simplified CAR system has great potential of being applicable
to full-chip OPC simulation.
Recently, photolithography process is facing many difficulties in patterning the circuit adequately, mainly due to the rapid decrease of the k1 factor. The limitation of numerical aperture (NA) causes the distortion of printed patterns, such as corner rounding, line end shortening, and the different bias between isolated and dense figures. The optical proximity effect correction (OPC) is the most popular method to solve this problem. Especially, we should apply the model-based OPC to the critical layers as the circuit patterns get smaller and more complex. The success of model-based OPC largely depends on the quality of the model, which describes the physics in the resist under a specific optical condition. A "good" model should have both the low fitting error and the full chip coverage. Efforts to lower the fitting error can lead to the degradation of physical meaning, and this would result in insufficient coverage of the model. To settle this concern, we should extract test patterns for model calibration that cover all the aerial image properties of full chip geometry. The investigation for selecting the data set for optical model tuning is also necessary to prevent the final model to be over fitted. In this paper, we will present test pattern selection strategy for optical model, and resist model.
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