KEYWORDS: Scatterometry, Metrology, Line edge roughness, Critical dimension metrology, Line width roughness, Semiconducting wafers, Electron beams, Electron beam direct write lithography, Lithography, Cadmium
Electron beam direct write (EBDW) can be utilized for developing metrology methods for future technology nodes. Due
to its advantage of high resolution and flexibility combined with suitable throughput capability, variable-shaped E-Beam lithography is the appropriate method to fabricate sub 40nm resist structures with accurately defined properties, such as critical dimension (CD), pitch, line edge roughness (LER) and line width roughness (LWR). In this study we present results of exposure experiments intended to serve as an important instrument for testing and fitting various metrology
and defect density measurement methods for future technology nodes. We successfully fabricated sub 40nm gratings with varying CD, pitch, programmed defects and LER/LWR. First metrology measurements by means of optical scatterometry on these dense structures show that variation of the signal response is sufficient to detect sub 10nm fluctuations with a satisfying repeatability.
For future technology nodes, highly accurate dimensional metrology will become more and more important. At this stage,
measuring layer thickness in planar test structures or geometrical dimensions in simplified proxy structures may be not
sufficient for accurate control of highly sophisticated process steps. Model-based dimensional metrology has the
potential to provide critical parameters of interest for process control in high volume manufacturing, while during
process and technology development the constrained flexibility of models and the required model-building efforts may
be a serious limitation. On the other hand, model-free dimensional metrology may provide sufficient flexibility for
process development, while in some cases it may not be production-worthy in high volume manufacturing. This article
details advantages and disadvantages of the different methods during the lifetime of a product starting from early
development to high-volume production.
KEYWORDS: Scatterometry, Semiconducting wafers, Scanning electron microscopy, 3D modeling, 3D metrology, Metrology, Process control, 3D applications, Scattering, Scatter measurement
Scatterometry is receiving considerable attention as an emerging optical metrology in the silicon industry. One area of progress in deploying these powerful measurements in process control is performing measurements on real device structures, as opposed to limiting scatterometry measurements to periodic structures, such as line-space gratings, placed in the wafer scribe.
In this work we will discuss applications of 3D scatterometry to the measurement of advanced trench memory devices. This is a challenging and complex scatterometry application that requires exceptionally high-performance computational abilities. In order to represent the physical device, the relatively tall structures require a high number of slices in the rigorous coupled wave analysis (RCWA) theoretical model. This is complicated further by the presence of an amorphous silicon hard mask on the surface, which is highly sensitive to reflectance scattering and therefore needs to be modeled in detail. The overall structure is comprised of several layers, with the trenches presenting a complex bow-shape sidewall that must be measured. Finally, the double periodicity in the structures demands significantly greater computational capabilities.
Our results demonstrate that angular scatterometry is sensitive to the key parameters of interest. The influence of further model parameters and parameter cross correlations have to be carefully taken into account. Profile results obtained by non-library optimization methods compare favorably with cross-section SEM images. Generating a model library suitable for process control, which is preferred for precision, presents numerical throughput challenges. Details will be discussed regarding library generation approaches and strategies for reducing the numerical overhead. Scatterometry and SEM results will be compared, leading to conclusions about the feasibility of this advanced application.
KEYWORDS: Scatterometry, Oxides, Atomic force microscopy, Semiconducting wafers, 3D metrology, Silicon, Process control, Scatter measurement, 3D modeling, Etching
Polysilicon recess etch process control in deep trench arrays of a DRAM requires reliable measurements of the recess depth directly in the trench array. Until now Atomic Force Microscopy (AFM) has been used for post etch depth measurements. However, with decreasing lateral trench dimensions, AFM may approach its limits especially with respect to the available bottom travel length. Consequently, alternative metrology methods are of interest. Scatterometry is an optical, model based measurement technique which potentially allows a full reconstruction of the measured structure. The measurement of the polysilicon recess presents a number of challenges: (1) the recess depth (150nm to 300nm) is much smaller than the total height of the complete structure (several microns), (2) spacer-like sidewall layers are present, while (3) unpredictable effects may be present (e.g. voids in the polysilicon fill) and would be difficult to include into a grating model. In addition, for measurements within the trench array 3D capability is required. In this work we analyze the capability of 2D and 3D scatterometry for polysilicon recess depth process control. We evaluate parameter sensitivities, parameter correlations, measurement robustness, depth correlation to the trench array, precision and accuracy for a wide range of process variations by comparing results obtained by scatterometry to those obtained by AFM and SEM cross sections. We show that a simplified grating model provides accurate measurements in lines/spaces structures (2D). However, in trench arrays (3D) the trench depth sensitivity is critical.
In the production of sub 140nm electronic devices, CD metrology is becoming more critical due to the increased demands placed on process control. CD metrology using CD-SEM is approaching its limits especially with respect to precision, resolution and depth of field. Potentially, scatterometry can measure structures down to 50nm with the appropriate precision. Additionally, as scatterometry is a model based technique it allows a full reconstruction of the line profile and the film stack. In this work we use SE based scatterometry in the control of a 110nm DRAM WSix Gate process at the Litho and the Mask Open step. We demonstrate the use of a single trapezoid as a basic shape model in FEM and field mapping applications as well as in a high volume production test. The scatterometry results are compared to CD-SEM data. We show that for the GC Litho application, n&k variations in some of the stack materials do not affect the scatterometry CD measurement significantly.
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