The configuration of polymer light waveguide electro-optical printed circuit board(EOPCB) is proposed in this paper. An
additional optical layer with light waveguide structure is used in conventional PCB to construct EOPCB. Light
waveguide core layer mould is made with SU-8 photolithograph. Polymer light waveguide layer which is embedded
between multiplayer PCB is made in experiment by Doctor-blading technology for large size application. Vertical cavity
surface emitting laser (VCSEL) array is used as optical transmitter array. PIN photodiode array is used as optical
receiver array. A MT-compatible direct coupling method is presented to couple light beam between optical
transmitter/receiver with light waveguide layer. The optical signals from a processor element chip on the PCB can
transmit to another processor element chip on the same PCB board through light waveguide interconnection in EOPCB.
So optical interconnection between chip to chip for parallel multiprocessor system can be reailzed by EOPCB.
A three-dimensional (3-D) 4×4×4 optical interconnect Mesh network scheme for parallel multiprocessor system based
on polymer light waveguide electro-optical printed circuit board(EOPCB) is proposed in this paper. The Mesh
topological structures of light waveguide interconnects for processor element chip-to-chip on a board, and board-toboard
on backplane is constructed. The system consists of 64 processor element chips interconnected in a 3-D Mesh
network configuration. Every processor board comprises 4x4 processor element chips with Mesh interconnection.
Board-to-board Mesh interconnects are established on a backplane through light waveguide Mesh interconnect
topological structure. An additional optical layer with light waveguide structure is used in conventional PCB to construct
EOPCB. Vertical cavity surface emitting laser (VCSEL) array is used as optical transmitter array. PIN photodiode array
is used as optical receiver array. A MT-compatible direct coupling method is presented to couple light beam between
optical transmitter/receiver with light waveguide layer. The optical signals from a processor element chip on a board can
transmit to another processor element chip on another board through light waveguide interconnection in the backplane.
So 3-D optical interconnection Mesh network for parallel multiprocessor system can be reailzed by EOPCB.
A chip-to-chip optical interconnection solution on PCB is presented in this paper. Both electrical and optical interconnections are used in common printed circuit board (PCB) to construct electro/optical PCB (EOPCB). An additional optical layer with waveguide structure is used in the PCB. So the EOPCB integrates the information medium "light" into the board. Optical transmitter is vertical cavity surface emitting laser (VCSEL) array. Optical receiver is PIN array. VCSEL array with its driver IC chip and PIN with its receiver IC chip are bonded with LSI chip by ball-grid array (BGA) technology. Then the LSI chips with VCSEL and PIN arrays are bonded on PCB by surface-mount technology (SMT). Multimode waveguides are used as optical layer in PCB. In order to couple light beam between optical transmitter/receiver with waveguide layer, a direct coupling method by the waveguide with 45° end face is presented. VCSEL chip is placed close to the 45° end face of the waveguide. The light beams from VCSEL array are emitted into the 45° end face directly and reflected by 90°, then coupled into the waveguide layer. No microlens arrays are needed for collimating light beam array in this configuration. A proof-of-principle experiment is made to verify the feasibility of this approach.
This paper reported an improved optical switching network configuration based on optical interconnection technology with vertical cavity surface emitting laser (VCSEL) array. The optical switching network consists of two-level optical interconnection backplane. It can connect 64 nodes with parallel optical links. The first level of optical interconnection backplane includes eight 8×8 crossbar interconnect sub-networks. Instead of one 8×8 crossbar interconnect sub-network in the second level of the optical interconnection backplane adopted in our original configuration, the second level of optical interconnection backplane has two 8×8 Crossbar interconnect sub-networks in this improved configuration. So the blocking rate is decreased. VCSEL-based parallel optoelectronic I/O interface is used as O/E conversion. Every I/O parallel interface between optical interconnection network and every node includes 18 VCSEL emitter pixels, 18 PIN receiver pixels. In order to couple 18 signal light beam array into optical fiber array ribbon, a fabrication technique based on the high precise position slot is used for assembling optical fiber array interface. A configuration of coupling packaging for the VCSEL pixel array to the fiber array with 45° end surface is also presented in this paper. An optical data transmission rate between interconnection nodes is 5Gb/s which is transmitted by the optical fiber ribbon-based parallel optical data links with 2 channels at data rate of 2.5Gb/s per channel. The aggregate bandwidth of 360Gbps for an 8×8 Crossbar optical fiber interconnect network backplane is achieved. The reliability of the fiber array with 45° end surface is tested in our experiment.
This paper describes the design of an OIF-approved 10Gbps very short reach parallel optical interconnect demonstrated system. It is a 12x1.25Gb/s channel parallel optics solution, leveraging the low cost transceiver (850nm VCSEL), and CMOS (SERDES) technologies originally developed for Gigabit Ethernet. The demonstrator comprises of SONET/SDH serial OC-192 interface, CPLD based convert IC, 1.25Gbps 12-channel parallel optical transmitter and receiver. The transmitter includes a 12-channel array of 850nm VCSEL, a 12-channel VCSEL driver LSI, and a precise coupling structure for 12 multi-mode-fibers ribbon. The receiver consists of a 12-channel array of pin-PDs, a 12-channel receiver LSI, and a precise coupling structure for 12 multi-mode-fibers ribbon. A CPLD chip, which maps the OC-192 framer onto the parallel optical links, and reassembles it after detection, has been developed. We also present the coupling package configuration for VCSEL arrays to fiber ribbon.
A novel hybrid electrical optical Clos switch network for multiprocessor cluster system was presented. For multiprocessor cluster system of 128 hosts, the novel optical Clos network includes 16 basic modules, a passive optical fiber backplane with (8×15)×16 which has a total of 1920 optical data channels and a signaling control system. The basic module is composed of the input line cards of 8 hosts, a single chip of 16×16 crossbar switch, parallel transmitting VCSEL modules for fan-out of (16-1)optical fiber channels and (16-1)×1 optical combiners. The passive optical fiber backplane of very large capacity and high density, based on linear VCSEL arrays and fiber ribbon technology, is to be used to interconnect between hosts of different sub-clusters. The routing of the optical Clos switch network is decided by a signaling control system. Compared with high performance electronic system, this technology offers a relatively easy and simple means of communicating large amount of information between hosts, and lower delay time.
A novel photonic switching network with vertical cavity surface emitting laser (VCSEL) array packaging for parallel multiprocessor cluster system is described. The parallel multiprocessor cluster system provides 64 serve nodes connected by photonic switching network with parallel optical links. There are eight cluster subsystems in the system. Each subsystem includes eight computing nodes and an optical interconnect backplane of 8x8 crossbar optical interconnection network with VCSEL-based optoelectronic I/O parallel interface. Every I/O parallel interface between optical interconnection network and every computing node includes 16 VCSEL emitter pixels, 16 PIN receiver pixels. In order to couple 16 signal light beam array into optical fiber array ribbon, a fabrication technique based on the high precise position slot is used for assembling optical fiber array interface. A packaging structure for optical fiber array interface is presented. As the position slots of optical fiber array interface are formed by VLSI photolithography and IcP etch techniques, and etching depth is smaller compared with V-groove slot, the high precision slots with 25Ojtm pitch can be obtained. A configuration of coupling packaging for 16 VCSEL pixel array to 16 fiber array with 45° end surface is also presented in this paper.
A photonic switching network for parallel multiprocessor cluster system using vertical cavity surface emitting laser (VCSEL) arrays is described. The parallel multiprocessor cluster system provides 64 server nodes interconnected by optical interconnection network with parallel optical links. There are 8 cluster subsystems in the system. Each subsystem includes 8 computers and an optical interconnect backplane of 8x8 crossbar optical interconnection network with VCSEL-based optoelectronic I/O interface. An optical data transmission rate between computers is 5Gb/s which is transmifted by the optical fiber ribbon-based parallel optical data links with 2 channels at data rate of 2.5Gb/s per channel. Every I/O interface between optical interconnection network with each computer includes 16 VCSEL emitter pixels, 16 PIN receiver pixels. VCSEL emitter pixels transformed electrical signals from PCI bus of computer into optical signals, where PIN receiver pixels transformed optical signals from optical interconnect network backplane into electrical signals. The whole optical interconnection network is composed of two level optical interconnect backplanes. A total of 64 computers propagating for data communication of 8 subsystems would be realized.
An optical interconnection network with parallel optical links for multiprocessor cluster system of 256 nodes is described. There are 16 subsystems in the system, in which each subsystem includes 16 computers and an optical fiver-ribbon interconnection plate of 16X16 crossbar interconnection network with VCSEL-based opto-electronic
interface. An optical data rate between computers is 5Gb/s which is transmitted by the optical fiber-ribbon based parallel optical data links with 4 channels at data rates of 1.25Gb/s per channel. Every interface between optical interconnection network and each computer includes 16X4 VCSEL pixels, 16X4 PIN pixels and (1X16)X4 electrical
switch. The whole optical interconnection network is composed of two level optical networks. There are sixteen optical fiber-ribbon interconnection plates of 16X16 crossbar interconnection network in the bottom level. The top level optical interconnection network would be an optical fiber-ribbon interconnection plate with a total of
2084 data channels propagating for communication of 16 subsystems.
This paper presents a novel 4 X 4 free-space polarization- independent bidirectional fiber optical switch based on 2 X 2 optical switch module. The optical architecture of the 4 X 4 optical switch is designed. The routing path for different switching state is analyzed in details. The performance analysis for this 4 X 4 fiber optical switch architecture is derived. The insertion loss of the 4 X 4 optical switch architecture is less than 4.4 dB and the interchannel crosstalk is less than -74 dB. The switch time is in microsecond range. This new kind of architecture of the optical switch grants the features of less optical components, high compactness, low optical interchannel crosstalk, fast switching sped, polarization insensitivity and easiness to optical assembly.
A novel optical implementation method of 4 X 4 polarization-independent bi-directional fiber optical switch in free-space optical architecture is presented in this paper. This 4 X 4 fiber optical switch is based on elementary 2 X 2 optical switch module. The 4 X 4 optical switch constituted by polarization beam splitters (PBS), 1/4 waveplates (QWP), polarization light modulator (PLM), right angle prism (RAP), and total reflection mirror (TR). Operation is independent by input signals of polarization of the optical beams. This new kind of configuration of the optical switch grants the features of less optical components, high compactness, low optical interchannel crosstalk, fast switching speed, polari insensitivity, and easiness to optical assembly. A matrix description is deduced with respect to this 4 X 4 fiber optical switch architecture.
This paper proposes a novel optical crossbar switching architecture. The proposed IP switch is based on an optical crossbar switching system, which take full use of advantages of electronics and photonics to face the challenge of the terabits per second IP switching. Group interconnect network is regarded as an ideal switching structure for its low blocking and excellent scalability. We add feedback loops to the group interconnect network, and got the better performance at the cost of slight extra hardware. In the paper, we simulated the cell loss rate of our optical crossbar switching network with feedback loops and several other switching network in the condition of uniform traffic and the burst traffic. The result shows that, in uniform traffic, the cell loss ratio (CLR) of our novel structure is less than 10e-9 , which is much lower than others; while in burst traffic, the CLR of ours is also lower than any of others. The hardware implementation of the switching network is also discussed. We proposed a high density optical waveguide interconnect board based on VCSEL/MSM detector arrays and free-space optical interface modules, which grants the features of high density signal channel, low cell loss rate, low optical interchannel crosstalk, small volume and simple structure.
In this paper, the crosstalk influence between signal channels of 4 X 48 free-space parallel optical interconnect network system based on VCSEL/CMOS optoelectronic chip and 2-D optical fiber data link is studied. The crosstalk analysis shows that the crosstalk between signal channels may be reduced by introducing a small displacement at vertical direction. This optical interconnection system can realize 12-bit wide bi- directional data transfer between four computers through a 4 X 48 high density 2-D optical fiber data link. The influence of the crosstalk would be reduced in this optical interconnect system.
A new free-space multistage optical interconnection network which is called the Comega interconnection network is presented. It has the same topological construction for the cascade stages of the Comega interconnection. The concept of the left Comega and the right Comega interconnection networks are given to describe the whole Comega interconnection network. The matrix theory for the Comega interconnection network is presented. The route controlling of the Comega interconnection network is decided based on the matrix analysis. The node switching states in cascade stages of the 8 by 8 Comega interconnection network for the route selection are given. The data communications between arbitrary input channel with arbitrary output channel can be performed easily.
An optoelectronic switching network with 2-D optical fiber bundle arrays I/O access device is presented in this paper. An optoelectronic recirculating Banyan network based on CMOS/SEED smart pixel device is used in this configuration. Thirty-two X two single-mode fiber bundle array and 32 X 2 multi- mode fiber bundle array are fabricated respectively based on the features of high density, high precision and array permutation of the CMOS/SEED optoelectronic integrated devices. The measuring results show that the center to center spacing between adjacent optical fibers in the same layer of the fiber array is 125 micrometer, and the spacing between adjacent layers is 500 micrometer. Displacing tolerance of the fiber bundle arrays is less than 2 micrometer and the angular tilt error is less than 0.02 degree.
A 16 X 16 Crossover photonic switching network with hybrid integrated CMOS/SEED smart pixel device and 2D optical fiber bundle array I/O access device is reported in this paper. SEEd array devices ar used as light receivers and transmitters, while CMOS devices make efficient logical processing. 4 X 40 2D multilayer optical fiber bundle arrays are fabricated and are used as I/O access devices in the crossover photonic switching network. The center to center spacing between adjacent optical fibers in the same layer of the fiber array is 125micrometers , and the spacing between adjacent layers is 250micrometers . Displacing tolerance of the fiber bundle arrays is less than 4 micrometers and the angular tilt error is less than 0.03 degree. It has the feature of high density, high precision, array permutation and easy to couple with 2D CMOS/SEED smart pixel device.
The design theory of fresnel microlens is described and the errors introduced by fabricating process are analyzed. The fresnel microlens arrays of four-level phase with diffractive efficiency larger than 60% are obtained. Crossover optical interconnect module is constructed by using fresnel microlens arrays.
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