T2SL (Type II Super Lattice) has become one of the most important material for infrared detector. It has now widely used for HOT MWIR detector and large format LWIR detector. The HOT detector is especially important for satellite application because HOT detector occupies small volume and requires small power. In this work, the radiation test results of MWIR T2SL nbn detector will be presented. The developed hybrid chip has the format of 2048 x 2048 pixels with 10 μm pitch. It was fabricated with Ga-free InAs/InAsSb absorber layer and GaAsSb barrier layer. The quantum efficiency of the developed hybrid chip is larger than 50% and the dark current is below 2 x 10-8 A/cm2. To be used in the space environment condition, the TID (Total Ionizing Dose) effects and DD (Displace Damage) effects were tested and test results are presented.
A large format, high density integration, high-performance infrared detectors are used in a wide range of imaging applications. However, it is difficult to fabricate a hybrid chip of a high performance infrared detector because of the low flip-chip bonding and under-fill process yields. In this work, the large format hybrid chip fabrication process with wafer level integration schemes is presented. In particular, the structure of the fabricated hybrid chip and the method of fabrication a hybrid chip by Au-to-Au bonding. Finally, the result of a hybrid chip made of pixel pitch 20μm is presented.
High operating temperature(HOT) is the key for low size, weight and power(SWaP) detector development and SWaP detector is the key for modern weapon system such as unmanned aerial vehicle(UAV) and man portable system. The low dark current that determines the operating temperature can be achieved by adopting InAs/InAsSb type-II superlattice(T2SL) absorber and nBn structure. In this work, HOT mid-wavelength infrared(MWIR) detector with InAs/InAsSb T2SL absorber and AlAsSb barrier was developed. The AlAsSb barrier shows excellent lattice match with GaSb substrate. Only the dry etch for pixel reticulation was applied to fabricate the device. At 80 K, dark current density is 2e-9 A/cm2 at the bias -0.2 V and, at 130 K, 2e-7 A/cm2 at the bias -0.1 V. The quantum efficiency was measured for both front side illumination and back side illumination. The back side illumination offers higher quantum efficiency than the front side illumination. The average quantum efficiency is about 50 % for front side illumination with 3 μm absorber. The 640 x 512 VGA format focal plane array(FPA) with 15 μm pitch was fabricated to study the temperature dependency of electro-optical characteristics. It was found that mean noise equivalent temperature difference(NETD) below 150 K is 15 mK, which is limited by the well capacitance. As the temperature increases NETD increases proportional to the dark current.
Large format high resolution FPAs are the key elements for medium to high performance applications including enhanced vision, thermal sights, and industrial applications. In this work, the characteristics of recently developed 10 μm pitch SXGA InSb detector are presented. To develop the 10 μm pitch SXGA InSb detector, three important technical issues were resolved. At first, physically isolating pixels to reduce the crosstalk was adopted to enhance the Modulation Transfer Function (MTF). It was found that the MTF of fabricated detector tested with slanted edge method was improved largely. The MTF of 10 μm pitch FPAs at the Nyquist frequency showed the same MTF of 15 μm pitch device at the Nyquist frequency. Therefore the zoomed image of 10 μm pitch device will have the same image quality as the 15 μm device. Another important issue is the indium bump fabrication process. To fabricate fine bump with uniform height, electrodeposition technology was developed. With this method, uniform indium bump over the 8' ROIC could be achieved. Finally, to achieve large capacitance, 0.18 μm CMOS technology was adopted. To use 0.18 μm CMOS technology, the ROIC should have to be designed all again. The designed and fabricated ROIC has 2.4 Me- with 3.3 V bias voltage and has 8 output channels with 20 MHz output rate. The developed 10 μm pitch InSb SXGA detector showed median NETD (Noise Equivalent Temperature Difference) of 22.6 mK. To measure the stability of developed 10 _m pitch InSb SXGA detector, system NETD(SNETD) was measured after thermal cycling. The SNETD of 30 mK was measured for more than 200 thermal cycling, which shows that the output of developed FPA is very stable.
Recently, infrared detectors have become increasingly dense and miniaturized. The development of micro solder bumps with small diameter and high aspect ratio is necessary for high pixel density and miniaturized infrared detectors. Indium solder bump has been used for infrared detectors because of its stability at low temperature, electrical conductivity and ductility. In this work, the method and results of forming indium bumps with uniform and high aspect ratio by electroplating is presented. In particular, the electroplating method for forming a uniform micro bump and the method for manufacturing a bump having a uniform height will be presented in detail. Finally, the result of indium bump made of pixel pitch 5 μm and 7.5 μm is presented.
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