Reduction in size and improvement of sensitive margins in modern semiconductor devices make them increasingly susceptible to stress and subsequent damage caused by the overvoltage. A fast responding and a higher energy absorbing overvoltage protection is desired. A hybrid solution is proposed. A moderate energy absorbing device is connected in parallel with a fast responding device to complement each other. Nonlinear current-voltage (IV) characteristics of these devices enable them to least interfere with the performance of the precision ac measurement system while reducing the effects of transient overvoltage. In this paper, the causes of transient overvoltage in ac-dc measurement system are analysed and a hybrid voltage limiting solution is proposed.
The characterization of SiGe diode-connected heterojunction bipolar transistors (HBTs) through measurements of two-circuit configurations is presented. Characterization is done to understand the behavior of these diodes for near-infrared detecting applications at room temperature and 77 K. The two configurations that are considered differ; the first is a base-emitter shorted HBT and the second is a base-collector shorted HBT. The parameters measured are current density-voltage, capacitance–voltage, and noise. The two configurations are implemented using the austriamicrosystems AG 0.35-μm process. The base-emitter shorted configuration exhibits a flatter JC versus V curve when in reverse bias compared with the base-collector configuration. The C − V curves are the same for both configurations. The noise voltage of the base-emitter configuration is 36 and 14.48 μV / Hz at 102.5 Hz for 293 and 77 K temperature points, respectively, to 14.48 and 12.42 μV / Hz at 50 kHz for 293 and 77 K, respectively. The noise voltage for the base-collector configuration is 12.6 and 7.56 μV / Hz at 102.5 Hz for 293 and 77 K, respectively, to 2.228 and 5.981 μV / Hz at 50 kHz for 293 and 77 K, respectively. This work is done using a standard Si-based technology, where a detector array with readout circuitry can be prototyped as a single chip. The floating base transistor topology is analyzed and used as a foundation for this work. The characteristics of a floating base configuration result in a wide depletion region, large-series resistance, and small-series capacitance. When shorting the base with the emitter and collector, respectively, compared with a floating base configuration, a smaller depletion region, reduced series resistance, and larger series capacitance are observed.
Silicon-germanium (SiGe) bipolar complementary metal-oxide semiconductor (BiCMOS) transistors have vertical doping profiles reaching deeper into the substrate when compared to lateral CMOS transistors. Apart from benefiting from high-speed, high current gain and low-output resistance due to its vertical profile, BiCMOS technology is increasingly becoming a preferred technology for researchers to realise next-generation space-based optoelectronic applications. BiCMOS transistors have inherent radiation hardening, to an extent predictable cryogenic performance and monolithic integration potential.
SiGe BiCMOS transistors and p-n junction diodes have been researched and used as a primary active component for over the last two decades. However, further research can be conducted with diode-connected heterojunction bipolar transistors (HBTs) operating at cryogenic temperatures. This work investigates these characteristics and models devices by adapting standard fabrication technology components.
This work focuses on measurements of the current-voltage relationship (I-V curves) and capacitance-voltage relationships (C-V curves) of diode-connected HBTs. One configuration is proposed and measured, which is emitterbase shorted. The I-V curves are measured for various temperature points ranging from room temperature (300 K) to the temperature of liquid nitrogen (77 K). The measured datasets are used to extract a model of the formed diode operating at cryogenic temperatures and used as a standard library component in computer aided software designs.
The advantage of having broad-range temperature models of SiGe transistors becomes apparent when considering implementation of application-specific integrated circuits and silicon-based infrared radiation photodetectors on a single wafer, thus shortening interconnects and lowering parasitic interference, decreasing the overall die size and improving on overall cost-effectiveness. Primary applications include space-based geothermal radiation sensing and cryogenic terahertz radiation sensing.
Integrated circuit (IC) technology has emerged as a suitable platform for infrared (IR) detector development. This technology is however susceptible to on-chip intrinsic noise. By using double-gate MOSFETs for detectors in the near-IR band, noise performance in the readout circuitry is improved, thereby enhancing the overall performance of these detectors. A 1 dB reduction in low-frequency noise is achieved, which is verified through simulations. It is shown that by using short-channel devices that noise improvement is furthermore obtained due to reduction in threshold voltage variation. The double-gate concept is applied in simulation to the three-transistor pixel topology and can also be implemented in other detector topologies such as the four-transistor pixel topology, since readout noise is not limited to specific IR detector topologies. The overall performance of near-IR detectors and the fill factor are significantly improved.
Classically gated infrared (IR) detectors have been implemented using charge-coupled devices (CCD). Bipolar complementary metal-oxide semiconductor (BiCMOS) technology emerged as a viable alternative platform for development. BiCMOS technology has a number of advantages over CCD and conventional CMOS technology, of which increased switching speed is one. The pixel topology used in this work is a reversed-biased diode connected heterojunction bipolar transistor. The disadvantage of CMOS detectors is the increased readout noise due to the increased on-chip switching compared to CCD, which degrades dynamic range (DR) and sensitivity. This yields increased switching speeds compared to conventional bipolar junction transistors. Sensitivity improved from 50 mA/W (peak) at 430 nm in CCD detectors to 180 mA/W (peak) (or 180,000 V/W ) at 665 nm in BiCMOS detectors. Other CMOS IR detectors previously published in the literature showed sensitivity values from 2750 to 5000 V/W or 100 mA/W . The DR also improved from 47 and 53 dB to 70 dB. The sensitivity of conventional CCD detectors previously published is around 53 mA/W . The second advantage is that detection in the near-IR band with conventional silicon integrated technology is possible. This work has shown increased detection capabilities up to 1.1 μm compared to Si detectors.
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