KEYWORDS: Design, Scanning electron microscopy, Overlay metrology, Monte Carlo methods, Electrons, Lithography, Precision measurement, Electron beam lithography, Design rules, Signal detection
As CMOS node advanced, device patterns become smaller and denser, which as a result, decrease overlay budget. Each contributor to overlay error is significant and should be minimized, even at early stage of technology development. The performance of optical overlay metrology is challenged by the difference between optical target and device structure, which response differently to lithography optics (aberration response), hence reduce correlation to device overlay. E-Beam overlay can mitigate this gap as it can measure device-size structures. In this case, the challenge is to measure small, dense and buried patterns, which may have low visibility (contrast and edge resolution), but still provide acceptable total measurement uncertainty (TMU) to reduce error budget from the tight overlay specs. Finding optimal target where its design is similar or close to device and is measurable with robust performance, without designing and re-design targets in multiple tape-out cycles, can be done by simulating scanning electron microscopy (SEM) measurements of different device-like targets and find the optimal point where predicted performances are good and the design is as close to the device. In this paper we propose a method that evaluates measurement performances of different SEM overlay target designs using e-Beam simulation of back-scatter electrons (BSE) yield from buried layers. Targets with different design rules: pitch, critical dimensions (CD) and edge-to-edge distance are simulated at different measurement conditions and results are compared to measurement of actual targets on wafer. The comparison shows that measurement performance can be predicted by simulation, which can point out optimal target design and measurement conditions.
We suggest advanced wafer engineering (i.e. Angle-ply Laminating Wafers(ALW)) which aim to tailoring and reducing wafer stress and distortion, in order to improve In-Cell Overlay(ICO) and On-Product Overlay(OPO). Especially, we focus ~nm devices adapting 3D-interconnection technology and scheme. In 3D-interconnection technology and scheme, Wafer to Wafer(W2W) bonding process are necessary harnessed. Unfortunately, it naturally induce large stress and distortion which are very sensitive to extrinsic and intrinsic property of wafer(i.e. initial warpage, thin film profile, wafer modulus). These wafer stress and distortion become a high risk in reducing overlay, as the cell size of device shrink. Thus, in development of ~nm devices, main key is to find effective and efficient method of wafer engineering reducing wafer stress and distortion. In order to handle this risk, we suggest and develop Angle-ply Laminating Wafers with heterogeneous crystal-structure, which is based on Classical Lamination Plate Theory(CLPT) in the area of advanced solid mechanics. By utilizing this design concept, anisotropic modulus of top and bottom wafer balance under W2W bonding process. As a result, it induce stress relaxation, distortion and reduce overlay. To verify it rigorously, we introduce the wafer stiffness tailoring method based on CLPT; and construct the simulation model predicting the W2W bonding distortion and photo overlay. We develop the W2W bonding simulation model based on framework of multiscale analysis and pre-verified by comparing with experiment results, which relate to the initial warpage effect on overlay and the thin film profile effect on bondability. Finally, we predict and analyze the effect of angle-ply laminating wafers with respect to a diverse combination of heterogeneous crystal-structure and stacking angle.
The advanced logic node is continuously shrinking toward sub-nm node and EUV lithography is the one of main drivers to reach better patterning resolution resulting in reduced process steps. Along with this design rule shrink, On Product Overlay (OPO) requirement has been critical to the device yield making the accuracy and stability of optical overlay measurement to become primary concern on the lithography process control. Historically Optical Microscope (OM) ADI overlay was accepted and the standard for control to meet OPO requirements. Along the past years, as OPO budget diminishes with node-to-node, OM overlay required additional supporting reference data to compensate the inherent accuracy problem. Industry adopted the accuracy correction knob with High Voltage SEM (HV-SEM) at post etch, also known as SEM AEI overlay. The SEM AEI overlay measures the error contribution of different process influence and the overlay mark to real device pattern overly bias together. The inaccuracy of OM ADI overlay has been treated as a non-correctable error components till the on-device overlay measurement of HV-SEM after etching was enabled to compensate the delta known as Non-Zero Offset (NZO) or Mis-Reading Correction (MRC). Today the HV-SEM on-device overlay measurement at AEI is widely adopted as one of critical component to meet the OPO requirement enabling scaling for all types of advanced CMOS devices production. The main driver of On-Device-Overlay (ODO) measurement at AEI step is the see-through imaging capability to see all relevant layers through the stack even though the measurement step/time differs on the same wafer of the ADI optical overlay measurement are ranging from few to two-digit days depending on the process complexity. There has been an increasing need for a faster response of overlay measurements to close the overlay control loop and breakdown the device to target error versus the process overly induce component – in other words, to correct in the right step. This leads to the necessity of SEM ADI overlay measurement. With the recent e-Beam evolution of more higher landing energy, probe current and improved Total Measurement Uncertainty (TMU) performance, SEM ADI overlay measurement is enabled and considered to show the performances to meet market requirements on the selected layers of interest. In this paper, we would like to demonstrate the enablement of SEM ADI overlay measurement including the accuracy comparison with OM ADI overlay on the DBO scribe target versus real device pattern measurement performance. With SEM ADI and AEI overlay measurement on the same patterns, we could also demonstrate the error breakdown between optical target to device and from ADI to AEI process induced error which will enable the better correctable methodology to minimize NZO/MRC. In addition, this process contribution to error breakdown could be extended to improve, in the future, the Edge Placement Error (EPE) control.
In this article the recent progress in the elements of EUV lithography is presented. Source power around 205W was demonstrated and further scaling up is going on, which is expected to be implemented in the field within 2017. Source availability keeps improving especially due to the introduction of new droplet generator but collector lifetime needs to be verified at each power level. Mask blank defect satisfied the HVM goal. Resist meets the requirements of development purposes and dose needs to be reduced further to satisfy the productivity demand. Pellicle, where both the high transmittance and long lifetime are demanded, needs improvements especially in pellicle membrane. Potential issues in high-NA EUV are discussed including resist, small DOF, stitching, mask infrastructure, whose solutions need to be prepared timely in addition to high-NA exposure tool to enable this technology.
Array CD uniformity can be measured by inspection tool and showed good correlation to traditional CD measurement
such as CD-SEM and OCD.[1] Due to the inspection tool's basic requirement which collects information over whole area
of wafer, the CD mapping from inspection images results in high spatial details within shot and along the wafer scale.
However the reflected light which comes from the interaction between sub-wavelength array pattern and illuminated
light isn't only responsible for CD variation of the illuminated area pattern. Other than lateral CD differences, thickness
variation of pattern and under layer films also result in light intensity changes on reflected light. Therefore the noise
separation other than CD variation is crucial factor on CD mapping using inspection tool. On the other hand, the
sensitivity of CD variation is dependent on the patterned layer materials and how it interacts with the polarization of
illuminated light.
From previous study, reflection light from sub wavelength array structure contains CD variation information and gives
linear response to the structure volume change. In this paper, CD test box which has intentional CD variation is
introduced to investigate on various parameters that result in reflectivity changes. Wavelength, polarization and optical
property of patterned structure are conducted to analyze the influence to the reflectivity signal. In parallel the
experimental results are compared with simulation result using RCWA and good correlation is achieved.
CD Uniformity (CDU) control is getting more concerning in lithographic process and required to control tighter as
design rule shrinkage. Traditionally CDU is measured through discrete spatial sampling based data and interpolated data
map represents uniformity trends within shot and wafer. There is growing requirement on more high sampling resolution
for the CDU mapping from wafer. However, it requires huge time consumption for CD measurements with traditional
methods like CD-SEM and OCD. To overcome the throughput limitation, there was an approach with inspection tool to
measure CD trends on array area which showed good correlation to the traditional CD measurement. In this paper, we
suggest a fast mask CD error estimation method using 0th order of diffraction. To accomplish fast measurement, simple
macro inspection tool was adopted to cover full wafer area and scan result gives good correlation with mask uniformity
data.
The two key factors in EUV lithography imaging will be flare and shadow effect among other issues. The flare which is
similar to the long range density loading effect and also known to be of high level will generate CD variation throughout
the exposure field while the EUV specific shadow effect differentiates H-V CDs along the slit. The long range character
of flare in EUV full field scanner can even affect CDs in the neighboring fields. It seems to be apparent that the major
imaging challenges for EUV lithography to be successfully adopted and applied to device manufacturing will be
determined by how smartly and effectively CD variations induced both by flare and shadow effect in the full chip level
are compensated. We investigated and assessed the previously proposed full chip level compensation strategies of the
flare and shadow effect in EUVL for the application to memory device both by simulation and experiments on the
condition of full field scanner. The effectiveness of flare compensation for the case of thin absorber mask was also
addressed together with related impact on the shadow induced H-V CD bias.
Extreme ultraviolet lithography (EUVL) is one of the leading candidates for next-generation lithography technology for
the 32 nm half-pitch node and beyond. We have evaluated the Alpha Demo Tool(ADT) characterizing for mixed-andmatched
overlay(MMO), flare noise, and resolution limit. For process integration, one of the important things in EUVL
is overlay capability. We performed an overlay matching test of a 1.35NA and 193 immersion tool using a low thermal
expansion material(LTEM) mask. We also investigated the flare level of the EUV ADT for device applications. The
current EUV tool has a higher flare level than ArF lithography tools. We applied a contact layer for 40nm node device
integration to reduce the variation in critical dimension(CD) from the flare noise.
Flare in EUV mirror optics has been reported to be very high and long range effect due to its character which is inversely
proportional to the 4th order of wavelength. The high level of flare will generate CD (Critical Dimension) variation
problem in the area where the gradient of aerial pattern density is large while the long range influencing character would
confront an issue of computational challenge either for OPC (Optical Proximity Correction) modeling or for any other
practical ways to accommodate such a long range effect. There also exists another substantial challenge of measuring
and characterizing such a long range flare accurately enough so that the characterized flare can successfully be used for
the compensation in the standard OPC flow.
We have fabricated extreme ultraviolet lithography (EUVL) blank masks consisting of a TaN absorber, Ru capping
layer, and Mo/Si multilayers using ion-beam sputter deposition and investigated their dependence on capping layer and
absorber stack structure. At EUV wavelengths, the reflectivities of the multilayers, including their dependency on the
thickness of the capping and absorber layers, are in good agreement with simulation results obtained using Maxwell
equations and the refractive indexes of each layer. Ru, one of the most promising capping materials on Mo/Si multilayers
due to its resistance to oxidation and selectivity to etching, also shows better EUV reflectivity than Si as a capping layer
if we choose a thickness that produces a constructive interference. To meet the reflectivity requirements (⩽ 0.5 %) in the
SEMI EUVL mask standard specifications, a TaN absorber at least 70 nm thick should be applied. However, aerial image
results simulated by using EM-Suite show that 40 nm is sufficient for the TaN absorber to display the maximum image
contrast. In addition, horizontal-vertical (HV) biasing effects due to mask shadowing become negligible if the TaN is
reduced to about 40 nm. As a result, we suggest using a thin TaN absorber 40 nm thick since it is able to minimize mask
shadowing effects without a loss of image contrast.
The impact of Stray Light (also sometimes called 'scattered light' or 'flare') in lithographic exposure tools is one of the key issues in EUV lithography to reduce its level to less than 10%. EUV mask can also be considered as one of the scattering sources because EUV mask used in memory and logic devices has various kinds of patterns with localized density variations, which are determined by patterned multilayer area. The most efficient way to decrease influences of stray light can be a combination of selective biasing and dummy implementation.
In this paper, the effect of EUV mask density variations on image quality is investigated in terms of process window, such as LWR, depth of focus, resolution, etc., while mask density surrounding features is varied from dark field to bright field by implementing dummy patterns. As a result, allowable mask background density, which does not affect image quality of surrounding features and decreases effects of stray light, is suggested.
In the extreme ultra-violet (EUV) lithography, a defect-free mask blank is one of the critical issues for high volume manufacturing. The defects of EUV mask are typically classified into phase defects and amplitude defects. The phase defects, which may be originally included in substrate or generated during multilayer deposition, are not easily detected after the deposition of absorber and buffer films, since an inspection tool using the visible light shows strong absorption in this wavelength range. In addition, it is important to confirm the level of blank mask defects before e-beam writing in order to prevent yield drop of mask manufacturing. Confocal inspection method has been developed and widely used to inspect substrate and blank mask in current optical and EUV lithography. However, this method can only detect defects which are located on flat surface and buried near the surface. In this paper, both the confocal inspection and patterned mask inspection are simulated by rigorous analysis method and also experimentally determined. As a result, simulation shows good agreement with experiments, and thus the simulation tool can be applied to estimate detectability and printability of multilayer defects. For patterned mask inspection, mask near field images are calculated by the rigorous method. Then, aerial images of EUV mask in patterned mask inspection system are simulated and several properties are also investigated.
A theoretical model of confocal microscopy of phase defect in EUV mask blank is developed using Fourier optics and rigorous coupled-wave analysis(RCWA). This model is verified by comparison with experimental data and then applied to calculating confocal microscopy signal of phase defect with conformal and flat surface for wavelength of 488 nm and 266 nm, respectively. From this simulation, it is shown that phase defect with flat surface is undetectable even by 266 nm-wavelength confocal microscope, while it is printable at 13.5 nm-wavelength. Subsequent simulation of energy flow rate through Mo/Si multilayer shows that this is because incident optical wave is absorbed within 4 pairs of Mo/Si multilayer, but 40 pair of Mo/Si multilayer is semi-transparent at 13.5 nm-wavelength. Based on this result, a deposition scheme of Mo/Si multilayer is suggested.
Defect is a killing factor in photomask fabrications. For 65nm node photomask fabrication, even smaller than 1 um particle can cause hard-to-repair defect. And it is not easy to find the defect source and solve it. For this reason, the process monitoring system that shows us current defect trend rapidly and effectively is highly required. At the same time, this system can be used for verifying the process stability and detecting unusual signals in process.
Defect-free mask is a dream of mask makers. Repair technology [1] that removes defects on Att. PSM is getting more attentions than ever. Therefore the fast and precise verification of repaired results is highly required. Most confirmation methods are carried out by using the inspection system because it is faster than AIMS to verify the repaired results. However, the accuracy of the verification using the inspection system cannot be compared to it with AIMS in the view of printability. In this paper, the results of optical simulation using top-down repair image are compared with those of AIMS for rapid confirmation of repaired results with competitive accuracy. Also, neural network which can compute the complex non-linear relationships easily are used to increase the accuracy of repair simulation.
Haze is a kind of surface contamination on photomask and lithography optics that made by photochemical reaction. There are many problems in photomask manufacturing, inspection and lithography process because of slowly growing feature of haze. In the photolithography process, the wafer damage has been occurred due to the time dependent growth of haze. In this study, we identified the origin and formation mechanism of haze using accelerated contamination experiments, also developed control methods for haze. From these results we expect that the photocontamination control technology should be developed and been a important part of NGL technology.
The optical resolution of photolithography is limited by the numerical aperture (NA) of lens, wavelength of light source, and k1 factor. Nowadays, the low k1 process is necessary, since the tool development is delayed due to technology difficulties. In order to enhance the process latitude in the low k1 region, special illumination design for specific patterns has been studied. Although illumination optimization is one of the promising solutions to develop the low k1 process, specific design for each pattern has not been applied since the case-by-case illumination design is not easy. The specific layer oriented illumination design is generated using our in-house tool. A DRAM cell is composed of periodic or semi-periodic patterns, and the design of layer specific illumination is made for those patterns with the target of enlarged depth of focus (DOF). It is observed that the DOF and exposure latitude of a DRAM isolated pattern using the optimized illumination are increased in comparison with the conventional annular illumination. It is expected that the lifetime of low-grade exposure tools can be extended by this illumination optimization technique.
In order to analyze a simultaneous correction of fogging and loading effect, the e-beam lithographic simulation was performed with dose modulation method. The in-house e-beam simulator which adopts Monte-Carlo method for electron scattering is used for performing Proximity Effect Correction (PEC) and fogging correction during the e-beam
lithographic processes. Various values of theta, representative parameter which describes the deposited energy by fogging, are used for simulation. Fogging effect is well known phenomenon which is the additional energy deposition into large exposed area by second electron scattering, and this fogging correction is successfully achieved by dose modulation method. However, etch loading cannot be compensated properly by modulating dose due to its unique
property. From the simulation results, it is obviously necessary to correct etch loading effect and fogging effect simultaneously in order to cure global and local CD errors. The bigger loading effect is, the bigger local CD error induced by dose modulation method is to be generated. This global error is reducible but irremovable perfectly owing the discrepancy between the property of etch loading effect and dose modulation. However, the proper selection of eta,
the ratio of the energy deposition into resist from the back scattering electrons verse the forward scattering electrons, can remarkably reduce the global and local CD errors. As a consequence, the method of the dose modulation is not the perfect way to correct the CD errors induced by etch loading or positional induced error. Nevertheless, the dose modulation method with variable eta can be an alternative way to control the designed CD because of its precision and rapidity.
By using volume holography characteristics, optical devices having demultiplexer and/or dispersion compensator capabilities are proposed which can control multiple channel wavelengths in the wavelength division multiplexed (WDM) system. Through a specially designed mask system, multiple volume gratings corresponding to the multi-channel components are recorded in a photorefractive crystal. This mask recording scheme simplifies the conventional sequential multiplexing procedure which requires complex mechanical or laser source system. Recording schemes and device characteristics of the above devices are presented in relation with volume diffraction principle and photorefractive crystal properties.
Random optical field i.e. speckle pattern of light, has been extensively investigated for various applications. Recently, it becomes generally known that the random optical field is appropriate for reference beam of holographic recording with spatial multiplexing. There are several methods to implement random optical field. Ground glass, multimode fiber, random binary mask etc., are used to implement random optical field. However these conventional methods can give only arbitrary randomness to light but cannot allow specific randomness. In this paper, we propose a design method of diffractive optical element for generating random optical field with specifically designed randomness that is applicable to hologram multiplexing system.
We propose a method of multiple grating formation in a photorefractive crystal by using a single diffractive mask. The diffractive mask is composed of several spatial frequency components so that the propagating optical wave produces three-dimensional interference patterns in the crystal. We note that it is a system of amplitude and phase gratings having various spatial frequency spectrum. The recorded pattern then can control the flow of another optical wave (signal wave) with different wavelength. This is an integrated version of the conventional hologram multiplexing technique in time domain. The recording and signal wavevectors are determined to satisfy the phase matching condition through the recorded pattern (i.e. Bragg grating). Because this recording method excludes complex time scheduling and mechanical movement of the conventional multiplexing, it provides stability and compactness in the recording procedure for mass production and can make optical devices possessing multiple Bragg gratings.
The inherent feature of the coherent optics is the speckle phenomena. To reduce the spiral speckle in the diffraction image generated by the diffractive optical element, we designed the boundary modulated diffractive optical element. The spiral speckles can be removed by introducing an appropriate smooth initial phase to the image plane and conserving the smoothness of it during the iteration process of the iterative Fourier transform algorithm. To conserve the smoothness of the phase on the image plane, the aperture shape of the diffractive optical element is modified optimally. The diffractive optical element with deformed aperture decreases the transmission efficiency. TO increase the transmission efficiency, the initial phase distribution of the image plane is optimized by use of the genetic algorithm.
KEYWORDS: Crystals, Near field, Near field scanning optical microscopy, Holograms, Multiplexing, Holography, Optical storage, Laser crystals, Near field optics, Semiconducting wafers
We present experimental results on the recording and retrieving multiplexed near-field holograms using near-field scanning optical microscopy (NSOM) and a conventional rectangular-parallelpiped or cubic photorefractive crystal. We use the fiber tip of NSOM both as an object and as a probe for scanning (reading) the images. The recording distance between the tapered tip of NSOM and the crystal (i.e. between the object and the recording medium) is a crucial factor determining the size of the stored spot and the angular selectivity since it is dependent on that distance whether the near-field components of the object wave can reach the crystal or not. Experiments on angular multiplexing show that the angular selectivity was about 0.01 degree and the retrieved spot size was smaller than the Rayleigh limit when the recording distance is about 10 nm. In addition, experiments show that near-fields originated from sub-diffraction-limit -size objects could be stored in a photorefractive crystal at 2 mm apart from the crystal surface resulting in the retrieval of sub-diffraction-limit- size spots which means that our scheme can provide a way of multilayer (stack-wise) near-field storage and, thus, contribute to the significant enhancement of the storage capacity of the near-field optical memory.
In mask-making process with e-beam lithography, the process stabilization can be evaluated by looking at the fluctuation of critical dimension (CD) uniformity, mean to target(MTT), and defect controllability. Among them, the capability of CD uniformity and mean to target depends strongly on the acceleration voltage of an exposure machine. Generally, a high acceleration voltage has advantages on dose latitude, pattern fidelity and CD linearity due to its small forward scattering range. Therefore, those merits using a high acceleration voltage can provide a higher yield for production photomask. In this paper, we have examined the CD uniformity and the MTT capability for production photomask fabrication in order to compare the process stabilization between 50 keV and 10 keV. By choosing a 50 keV exposure, significant improvements can be made in CD uniformity and MTT capability.
Phase shift mask (PSM) with optical proximity effect correction (OPC) is the efficient tool of the resolution enhancement technology (RET). Particularly, it is commonly known that the attenuated PSM(att.PSM) has some merits in the memory device with a repeated cell patterns. But there are only a few results of what illumination systems affect the performance of the attPSM and how much the transmittance of the attPSM affects the lithography performance -- such as resolution and depth of focus. In this paper, we will present the optimized illumination systems for patterning with the attPSM, and the relationship between the transmittance of the attPSM and the lithography performance by using simulations and experiments. The resolution of KrF lithography with the Hi-T att.PSM can be extended to 130 nm through the simulation. We extend the resolution of KrF lithography with the Hi-T att.PSM to 150 nm through the experiment.
The presence of contaminants and particles on the surface has been long recognized as a cause of reduced wafer yields and delayed mask TAT. Especially, as the device pitch is continuously decreasing below submicron, the size of the contaminants and particles which must be controlled is decreasing below quarter-micron. It is believed that the megasonic process with the SC-1 chemical is the most important wet cleaning process in particle removal technology. The megasonic cleaning, which is dependent on the transmittance of megasonic power, is a commonly used technique for removing particles on the surface of a photomask. In this paper, in terms of both simulation and experiment, the transmittance of sound was obtained by varying the liquid temperature, the inclined angle, and the thickness of the bottom plate in the inner bath. Finally, after comparison of experimental results with simulation ones, we obtained the transmittance characteristics with similar tendency.
As field size is increased and design rule goes down to O.l8pm, more tight control of defects on the reticle is required than before. T his requirement is m ore critical on contact patterns than line and space(L/S) patterns in the case of the same size of defect. In this paper, test reticles which have background normal contact patterns and background OPC(optical Proximity Correction) contact patterns, respectively, have been investigated for 256M DRAM level. We included a wide variety of programmed defects in background patterns. The geometry of the background contact patterns on the reticle has been designed for 0.3 1 pm m ore or less when printed on a wafer with a 4X reduction stepper. The programmed defects are used for the sensitivity evalution of a defect inspection system, i.e, detectability. Also printability of these defects on the wafer is performed by using a 4X reduction DUV(248nm) stepper to deterrn me not only the reticle defect specification but also the detectability required for the defect inspection system. Test results are as follows: First, the defect specifications required for 256M DRAM can be determined. Second, OPC contact patterns have better wafer results than normal contact patterns in view of depth of focus(DOF) and defect printability. Third, inspection technique for OPC patterns remains the task to be solved.
Keywords : detectability, printability, programmed defect, OPC, DOF, serif, simulation
For binary masks, focused ion beam (FIB) repair of opaque defects is of importance to improve mask yield and turn- around-time with the increasing packing density and continuing shrinkage of feature sizes. The effectiveness of the FIB mask repair is mainly limited by riverbedding, glass overetching, gallium staining, knock-on chrome, and image shift due to charging effect. These effects exert more influence on contact patterns than line and space patterns in the case of the same size of opaque defects under given design rule. In this paper, we investigate FIB repair of test masks which have background contact patterns with a variety of programmed opaque defects including unopened contact for feasible application of 64 M DRAM level. The geometry of the background contact pattern is designed for an approximate target critical dimension (CD), 0.41 micrometers whose feature size is a rough limit of the contact CD with reasonable depth-of-focus (DOF) and exposure time (ET) margin for binary masks when printed on a wafer with a 5X reduction i-line (365 nm) stepper. After repair with an optimum dose, a series of procedures for confirming its success is presented, that is, detectability, aerial image measurement software results, and wafer printability results. In addition, atomic force microscope results and 3D optical lithography simulation are presented for comparison. In our experiment and simulation results, (Delta) ET equals 100 msec and DOF equals 0.6 micrometers are obtained for the repaired contact.
As field size is increased and design rule goes down to 0.25 μm more accurate control of defects on the reticle coming from the manufacturing process or the handling process is required than before. In this paper, test reticles which have background contact patterns with a wide variety of defect types, sizes, and locations have been investigated for 256M DRAM level. The geometry of the background contact pattern on the reticle has been designed for 0.30 μm more or less when printed on a wafer with a 4x reduction stepper. The programmed defects are used for the sensitivity evaluation of a defect inspection system, i.e., detectability. Also printability of these defects on the wafer is performed by using a 4x reduction DUV stepper to determine not only the reticle defect specification but also the detectability required for the defect inspection system. As a result, it has been shown that the depth-of-focus (DOF) and the defect specifications required for 256M DRAM level within the constraints of ±10% critical dimension control at fixed exposure dose can be determined. For comparison the impact on defect printability has been determined using 3D optical lithography simulation in the case of chrome extension and clear extension, respectively.
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