Mr. Guillermo Castro-Luis Profile

Guillermo Castro-Luis

at Wooptix SL

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Author

Publications (6)

Proceedings Article | 18 September 2024 Paper

New optical metrology method for measuring shape of a lithography photo mask

Guillermo Castro Luis, Kiril Ivanov Kurtev, Miguel Jiménez, Juan Trujillo-Sevilla, Jose Manuel Ramos-Rodríguez, Jan Gaudestad

Proceedings Volume 13273, 132730T (2024) https://doi.org/10.1117/12.3026887

KEYWORDS: Photomasks, Reflection, Chromium, Quartz, Semiconducting wafers, Distortion, Wavefronts, Lithography, Overlay metrology, Phase imaging

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Proceedings Article | 10 April 2024 Poster + Paper

New optical metrology technique for measuring the shape of a lithography photo mask

Guillermo Castro Luis, Kiril Ivanov Kurtev, Miguel Jiménez, Juan Trujillo-Sevilla, Jose Manuel Ramos-Rodríguez, Jan Gaudestad

Proceedings Volume 12955, 129553L (2024) https://doi.org/10.1117/12.3011886

KEYWORDS: Photomasks, Reflection, Chromium, Pellicles, Quartz, Semiconducting wafers, Wavefronts, Lithography, Neodymium, Phase imaging

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Proceedings Article | 21 November 2023 Presentation + Paper

New technique for measuring free-form wafer shape to enable wafer distortion predictions

Kiril Ivanov Kurteva, Guillermo Castro Luis, Juan Trujillo-Sevilla, Jan Gaudestad, Richard van Haren, Leon van Dijk, Ronald Otten

Proceedings Volume 12750, 127500H (2023) https://doi.org/10.1117/12.2687605

KEYWORDS: Semiconducting wafers, Optical alignment, Silicon, Alignment modeling, Data acquisition, Coating stress, Wavefronts, Wafer-level optics, Scanners, Optical parametric oscillators

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On product overlay (OPO) is one of the most critical parameters for continued scaling according to Moore’s law. Besides the lithography scanner, also non-lithography processes contribute to the OPO performance. For example, processes like etching and thin film deposition can introduce stress, or stress changes, in the thin films on top of the silicon wafers. In general, the scanner Higher Order Wafer Alignment model up to 3rd order (HOWA3) has proven to be adequate to correct for most process-induced wafer distortions. This model is typically used with 28 wafer alignment marks placed across the wafer to correct for more global stress-induced distortions. It is evident that if the stress variation manifests itself on shorter length scales, either more alignment marks are needed in combination with a more sophisticated wafer alignment model, or an alternative measurement of the wafer distortion is required. A viable alternative to characterize local wafer deformations is by measuring the free-form wafer-shape change due to processing. In case the wafer-shape change can be translated into a wafer distortion map, it can be complementary to what is already captured by the scanner wafer alignment model. In this paper, we would like to explore this functionality that is based on a new method to measure the free-form wafer shape. Wave Front Phase Imaging (WFPI) generates the wafer shape by registering the intensity of the light reflected off the patterned or blank silicon wafer surface at two different locations along the optical path. The wafer is held vertically to allow for the free-form wafer shape to be measured without being affected by gravity. We show data acquired on specialty made silicon wafers using a WFPI lab tool that acquired 16.3 million data points on a 300mm wafer with 65μm spatial resolution. The obtained free-form wafer-shape measurements are fed into existing prediction models and the resulting wafer distortion maps are compared with scanner measurements.

Proceedings Article | 5 October 2023 Paper

New wave front phase sensor used for 3D shape measurements of patterned silicon wafers

Kiril Ivanov Kurtev, Juan Trujillo-Sevilla, Miguel Jiméneza, Rubén Abranta, Guillermo Castro Luis, Jan Gaudestad

Proceedings Volume 12802, 128020C (2023) https://doi.org/10.1117/12.2675624

KEYWORDS: Semiconducting wafers, Silicon, Data acquisition, Reflection, Wavefronts, Metals, Image sensors, Cameras, Wafer-level optics, Collimation

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On product overlay (OPO) is one of the most critical parameters for the continued scaling according to Moore’s law. Without good overlay between the mask and the silicon wafer inside the lithography tool, yield will suffer. As the OPO budget shrinks, non-lithography process induced stress causing in-plane distortions (IPD) becomes a more dominant contributor to the shrinking overlay budget. To estimate the process induced in-plane wafer distortion after cucking the wafer onto the scanner board, a high-resolution measurement of the freeform wafer shape of the unclamped wafer, with the gravity effect removed, is needed. A high-resolution wafer shape map using a feed-forward prediction algorithm, as has been published by ASML, can account for both intra and inter die wafer distortions, minimizing the need for alignment marks on the die and wafer in addition to that it can be performed at any lithography layer. Up until now, the semiconductor industry has been using Coherent Gradient Sensing (CGS) interferometry or Fizeau interferometry to generate the wave front phase from the reflecting wafer surface to measure the free form wafer shape. However, these techniques have only been available for 300mm wafers. In this paper we introduce Wave Front Phase Imaging (WFPI), a new technique that can measure the free form wafer shape of a patterned silicon wafer using only the intensity of the reflected light. In the WFPI system, the wafer is held vertically to avoid the effects of gravity during measurements. The wave front phase is then measured by acquiring only the 2-dimensional intensity distribution of the reflected non-coherent light at two or more distances along the optical path using a standard, low noise, CMOS sensor. This method allows for very high data acquisition speed, equal to the camera’s shutter time, and a high number of data points with the same number of pixels as available in the digital imaging sensor. In the measurements presented in this paper, we acquired 7.3 million data points on a full 200mm patterned silicon wafer with a lateral resolution of 65μm. The same system presented can also acquire data on a 300mm silicon wafer in which case 16.3 million data points with the same 65μm spatial resolution were collected.

Proceedings Article | 28 September 2023 Presentation + Paper

New patterned silicon wafer shape metrology system

Kiril Ivanov Kurtev, Juan Trujillo-Sevilla, Guillermo Castro Luis, Miguel Jiméneza, Rubén Abrante, José Manuel Ramos-Rodríguez, Jan Gaudestad

Proceedings Volume 12665, 126650A (2023) https://doi.org/10.1117/12.2678349

KEYWORDS: Semiconducting wafers, Silicon, Data acquisition, Reflection, Wavefronts, Image sensors, Cameras, Wafer-level optics, Photovoltaics, Metrology

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On-product overlay (OPO), with its continually shrinking overlay budget, remains a constraint in the continued effort at increasing device yield. Overlay metrology capability currently lags the need for improved overlay control, especially for multi-patterning applications. The free form shape of the silicon wafer is critical for process monitoring and is usually controlled through bow and warp measurements during the process flow. As the OPO budget shrinks, non-lithography process induced stress causing in plane distortions (IPD) becomes a more dominant contributor to the shrinking overlay budget. To estimate the wafer process induced IPD parameters after cucking the wafer inside the lithographic scanner, a high-resolution measurement of the freeform wafer shape of the unclamped wafer is needed. The free form wafer shape can then be used in a feed-forward prediction algorithm to predict both intra field and intra die distortions, as has been published by ASML, to minimize the need for alignment marks on the die and wafer and allows for overlay to be performed at any lithography layer. Up until now, the semiconductor industry has been using Coherent Gradient Sensing (CGS) interferometry or Fizeau interferometry to generate the wave front phase from the reflecting wafer surface. The wave front phase is then used to calculate the slope which again generates a shape map of the silicon wafer. However, these techniques have only been available for 300mm wafers. In this paper we introduce Wave Front Phase Imaging (WFPI), a new technique that can measure the free form wafer shape of a patterned silicon wafer using only the intensity of the reflected light. In the WFPI system, the wafer is held vertically to avoid the effects of gravity during measurements. The wave front phase is then measured by acquiring only the 2- dimensional intensity distribution of the reflected non-coherent light at two or more distances along the optical path using a standard, low noise, CMOS sensor. This method allows for very high data acquisition speed, equal to the camera’s shutter time, and a high number of data points with the same number of pixels as available in the digital imaging sensor. In the measurements presented in this paper, we acquired 7.3 million data points on a full 200mm patterned silicon wafer with a lateral resolution of 65μm. The same system presented can also acquire data on a 300mm silicon wafer in which case 16.3 million data points with the same 65μm spatial resolution were collected.

Proceedings Article | 15 August 2023 Poster + Paper

New wafer shape measurement technique for 300mm blank vertically held silicon wafers

Juan Trujillo-Sevilla, Rubén Abrante, Miguel Jiménez, Kiril Ivanov Kurtev, Guillermo Castro Luis, Jan Gaudestad

Proceedings Volume 12618, 126182X (2023) https://doi.org/10.1117/12.2674201

KEYWORDS: Semiconducting wafers, Silicon, Wavefronts, Reflection, Cameras, Image sensors, Collimation, Photovoltaics, Data acquisition, Wafer testing

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Showing 5 of 6 publications

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