Patterning variability at tight metal pitch leads to a high risk for reliability failures. In 2023, we (Intel) demonstrated a novel EUV-based multi-patterning process enhanced by directed self-assembly (DSA) to scale metal pitch to 18 nm and below along with electrical validation data. The DSA process rectifies systematic and random variations in EUV patterns at 60% lower dose and in combination with spacer-aligned double patterning results in low-defectivity and low- variability metal patterns at the tightest pitch. Here we go further and demonstrate design flexibility, tone-inversion capability to enable subtractive metallization, sub-20nm metal end-to-ends, via and line resistances in line with model expectations, robust end-of-line standard cell chain and comb yields, and world-first demonstration of robust reliability data with matched dielectric breakdown and electromigration to a mature process at looser pitch.
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