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13 June 2022 Evaluation of robust EPE monitoring and control metric methodologies for advanced DRAM nodes yield improvement
Yaniv Abramovitz, Jeong-Ho Yeo, Taekwon Jee, Hong-Goo Lee, Sang-Ho Lee, Chan-Ha Park
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Proceedings Volume PC12053, Metrology, Inspection, and Process Control XXXVI; PC120530N (2022) https://doi.org/10.1117/12.2613931
Event: SPIE Advanced Lithography + Patterning, 2022, San Jose, California, United States
Abstract
The Edge Placement Error (EPE) is growing concerns due to the complexity increases of process variation as the design rule shrinkage of DRAM device. The EPE is a well-accepted and construction metric which can be derived from CD, Overlay and LER measurements from more than patterning layers that concerned. With the consideration of the data consistency and to create a unified method to serve as an industry standard we evaluated 3 approaches: equation based, polygon based, measurement based – to calculate / combine / measure the device EPE. Results will be discussed in the presentation
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Yaniv Abramovitz, Jeong-Ho Yeo, Taekwon Jee, Hong-Goo Lee, Sang-Ho Lee, and Chan-Ha Park "Evaluation of robust EPE monitoring and control metric methodologies for advanced DRAM nodes yield improvement", Proc. SPIE PC12053, Metrology, Inspection, and Process Control XXXVI, PC120530N (13 June 2022); https://doi.org/10.1117/12.2613931
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KEYWORDS
Overlay metrology
Image processing
Line edge roughness
Metrology
Yield improvement
Critical dimension metrology
Process control
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