Paper
10 April 2015 Induced e-beam charge impact on spatial orientation of gate-all-around silicon wires device fabricated on boron nitride substrate
Shimon Levi, Konstantin Chirko, Ofer Adan, Guy Cohen, Sarunya Bangsaruntip, Leathen Shi, Alfred Grill, Deborah Neumayer
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Abstract
For Gate-all-around (GAA) MOSFETs the nanowires are suspended between source and drain anchors allowing conformal deposition of the gate around (i.e., GAASiNW) the silicon nanowire channel. 3DSEM measurement show that silicon wires tend to buckle between the source and drain anchors as function of their diameter and length. This phenomenon can impact device performance and therefore needs to be characterized. Resent metrology research performed on Silicon nanowires fabricated over a Boron Nitride (BN) layer demonstrated that Silicon nanowires spatial orientation is influenced by local electrostatic charge induced by the SEM electron beam irradiation. The scanning electron beam leads to charging of the floating conductive silicon wires and dielectric BN layer. Difference in charging mechanisms of the two materials lead to the formation of Coulomb forces acting between the wires and the BN layer.

We were able to change the spatial orientation of Silicon nanowires by modifying scanning conditions which effectively controls the amount of charging induced by the SEM. Strong charging, which corresponds to high dose leads to change of silicon wires spatial orientation, they appear straight in SEM top view and tilt image planes. Reducing charging by the means of scan rate increase or lower number of scanned frames saves the silicon wires buckled in their natural state.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Shimon Levi, Konstantin Chirko, Ofer Adan, Guy Cohen, Sarunya Bangsaruntip, Leathen Shi, Alfred Grill, and Deborah Neumayer "Induced e-beam charge impact on spatial orientation of gate-all-around silicon wires device fabricated on boron nitride substrate", Proc. SPIE 9424, Metrology, Inspection, and Process Control for Microlithography XXIX, 942407 (10 April 2015); https://doi.org/10.1117/12.2086104
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KEYWORDS
Silicon

Nanowires

Oxides

Scanning electron microscopy

Dielectrics

Boron

Metrology

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