Paper
28 May 2013 A 2.5 Gb/s low-voltage CMOS fully-differential adaptive equalizer
C. Gimeno, E. Guerrero, C. Aldea, S. Celma
Author Affiliations +
Proceedings Volume 8764, VLSI Circuits and Systems VI; 876402 (2013) https://doi.org/10.1117/12.2017457
Event: SPIE Microtechnologies, 2013, Grenoble, France
Abstract
A new low-voltage high-speed CMOS fully-differential adaptive equalizer based on the spectrum-balancing technique is presented. It was designed to compensate the strong attenuation of the transmitted signal through a 50-m length SI-POF. The proposed equalizer, which targets a 2.5 Gb/s transmission for a simple NRZ modulation, was designed in a standard 0.18-μm CMOS process and uses a 1-V supply voltage with a total power consumption below 17.3 mW. An enhancement in the signal BW from 100 MHz to 1.8 GHz for a 50-m POF length is achieved.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
C. Gimeno, E. Guerrero, C. Aldea, and S. Celma "A 2.5 Gb/s low-voltage CMOS fully-differential adaptive equalizer", Proc. SPIE 8764, VLSI Circuits and Systems VI, 876402 (28 May 2013); https://doi.org/10.1117/12.2017457
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Cited by 4 scholarly publications.
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KEYWORDS
Phase only filters

Virtual colonoscopy

Transistors

Linear filtering

CMOS technology

Electronic filtering

Control systems

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