Performance analysis of the scalable video coding (SVC) extension of H.264/AVC for constrained scenarios

N. Suarez; Gustavo M. Callico; Sebastian Lopez; Jose Lopez; Roberto Sarmiento

doi:10.1117/12.888269

3 May 2011 Performance analysis of the scalable video coding (SVC) extension of H.264/AVC for constrained scenarios

N. Suarez, Gustavo M. Callico, Sebastian Lopez, Jose Lopez, Roberto Sarmiento

Proceedings Volume 8067, VLSI Circuits and Systems V; 80670J (2011) https://doi.org/10.1117/12.888269
Event: SPIE Microtechnologies, 2011, Prague, Czech Republic

Abstract

Scalable Video Coding (SVC) is the extension of H.264/AVC standard proposed by Joint Video Team (JVT) to provide flexibility and adaptability on video transmission. SVC is an extension of the H.264/AVC codec that exploits the use of layers, what permits to obtain a bit stream where specific parts can be removed to obtain an output video with a lower resolution (temporal or spatial) and/or lower quality/fidelity. This paper provides a performance analysis of the scalable video coding (SVC) extension of H.264/AVC for constrained scenarios. For this, the open-source decoder called "Open SVC Decoder" was adapted to obtain a version likely to be implemented in reconfigurable architectures. For each scenario a set of different sequences were decoded to analyze the performance of each functional block inside the decoder. From this analysis we conclude that reconfigurable architectures are a suitable solution for an SVC decoder in a constrained device or for a specific range of scalability levels. Our proposal consists in architecture of a SVC decoder that admits different options depending on device requirements where certain blocks are customizable to improve the performance of decoder in hardware resources usage and execution time.

Citation Download Citation

N. Suarez, Gustavo M. Callico, Sebastian Lopez, Jose Lopez, and Roberto Sarmiento "Performance analysis of the scalable video coding (SVC) extension of H.264/AVC for constrained scenarios", Proc. SPIE 8067, VLSI Circuits and Systems V, 80670J (3 May 2011); https://doi.org/10.1117/12.888269

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