Performance of tri-layer process required for 22 nm and beyond

Yayi Wei; Martin Glodde; Hakeem Yusuff; Margaret Lawson; Sang Yil Chang; Kwang Sub Yoon; Chung-Hsi Wu; Mark Kelling

doi:10.1117/12.879301

15 April 2011 Performance of tri-layer process required for 22 nm and beyond

Yayi Wei, Martin Glodde, Hakeem Yusuff, Margaret Lawson, Sang Yil Chang, Kwang Sub Yoon, Chung-Hsi Wu, Mark Kelling

Proceedings Volume 7972, Advances in Resist Materials and Processing Technology XXVIII; 79722L (2011) https://doi.org/10.1117/12.879301
Event: SPIE Advanced Lithography, 2011, San Jose, California, United States

Abstract

Silicon-containing antireflection coating (SiARC) and spin-on carbon (SOC) under-layers have been widely implemented for advanced semiconductor manufacturing since the 45 nm node. The combination of SiARC and SOC promises a superior solution for reflection control and a high etch selectivity. With the industry marching towards 22 nm and beyond, the tri-layer materials and processes are being finely tuned to meet the requirements. We report comprehensive evaluation results of the SiARC (with high silicon content) and carbon under-layer from manufacturing perspective. It focuses on the performances that are required to extend the tri-layer applications from the original 45 nm nodes to 22 nm and beyond, such as thickness selection, etch selectivity, resist compatibility, rework capability, and under-layer pattern wiggling issues.

Citation Download Citation

Yayi Wei, Martin Glodde, Hakeem Yusuff, Margaret Lawson, Sang Yil Chang, Kwang Sub Yoon, Chung-Hsi Wu, and Mark Kelling "Performance of tri-layer process required for 22 nm and beyond", Proc. SPIE 7972, Advances in Resist Materials and Processing Technology XXVIII, 79722L (15 April 2011); https://doi.org/10.1117/12.879301

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