Dislocation reduction in CdTe epilayers grown on silicon substrates using buffered nanostructures

Shashidhar Shintri; Sunil Rao; Huafang Li; Ishwara Bhat; Smita Jha; C. Liu; Thomas Kuech; Witold Palosz; Sudhir Trivedi; Fred Semendy; Priyalal Wijewarnasuriya; Yuanping Chen

doi:10.1117/12.861735

27 August 2010 Dislocation reduction in CdTe epilayers grown on silicon substrates using buffered nanostructures

Shashidhar Shintri, Sunil Rao, Huafang Li, Ishwara Bhat, Smita Jha, C. Liu, Thomas Kuech, Witold Palosz, Sudhir Trivedi, Fred Semendy, Priyalal Wijewarnasuriya, Yuanping Chen

Author Affiliations +

Proceedings Volume 7768, Nanoepitaxy: Homo- and Heterogeneous Synthesis, Characterization, and Device Integration of Nanomaterials II; 77680A (2010) https://doi.org/10.1117/12.861735
Event: SPIE NanoScience + Engineering, 2010, San Diego, California, United States

Abstract

High performance HgCdTe IR detector fabrication on silicon substrates first requires low defect density CdTe buffer layers to be grown on silicon. The objective of this paper is to demonstrate dislocation reduction in CdTe epitaxial layers grown on silicon substrate by using intermediate nanocrystalline CdTe buffer layers. Colloidal synthesis of high quality CdTe nanocrystals was accomplished and spin coating of these CdTe nanocrystals as buffer layers on silicon substrates was carried out. CdTe layers were grown on these buffered substrates by metalorganic chemical vapor deposition (MOCVD). However, the incomplete removal of SiO₂ on silicon substrate (by chemical treatment) prevented the exact orientation of the nanocrystals with the silicon substrate and over layer growth of continuous single crystal CdTe epitaxial film. Two new approaches were further investigated: (i) First a thin film of Ge was grown on Si, followed by the deposition of thin SiO₂ followed by nanopatterning using block co-polymer (BCP) lithography. Transmission electron microscopy (TEM) showed defect reduction in the CdTe layers grown on these substrates, but the x-ray rocking curves over a larger area gave wider full width half maximum values compared to that of layers grown on blanket surfaces. This was attributed to non uniform nanopatterning in these initial studies; (ii) SiO₂ coated silicon substrates were nanopatterned using interference lithography with a honeycomb array of holes. These substrates will be used for the selective growth of germanium and CdTe by MOCVD.

Citation Download Citation

Shashidhar Shintri, Sunil Rao, Huafang Li, Ishwara Bhat, Smita Jha, C. Liu, Thomas Kuech, Witold Palosz, Sudhir Trivedi, Fred Semendy, Priyalal Wijewarnasuriya, and Yuanping Chen "Dislocation reduction in CdTe epilayers grown on silicon substrates using buffered nanostructures", Proc. SPIE 7768, Nanoepitaxy: Homo- and Heterogeneous Synthesis, Characterization, and Device Integration of Nanomaterials II, 77680A (27 August 2010); https://doi.org/10.1117/12.861735

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available

Members: $17.00

Non-members: $21.00 ADD TO CART

PROCEEDINGS
9 PAGES

DOWNLOAD PAPER SAVE TO MY LIBRARY

GET CITATION

RIGHTS & PERMISSIONS

Get copyright permission Get copyright permission on Copyright Marketplace

KEYWORDS

Silicon

Nanostructures

Semiconducting wafers

Germanium

Oxides

Nanoparticles

Lithography

Show All Keywords

Keywords/Phrases

Search In:

Publication Years