Comparative study of process window identification methods for 45 nm device and beyond

HoSeong Kang; SooCheol Lee; MinHo Kim; KiHo Kim; YongTeak Jeong; YeonHo Pae; ChangHo Lee

doi:10.1117/12.814019

23 March 2009 Comparative study of process window identification methods for 45 nm device and beyond

HoSeong Kang, SooCheol Lee, MinHo Kim, KiHo Kim, YongTeak Jeong, YeonHo Pae, ChangHo Lee

Proceedings Volume 7272, Metrology, Inspection, and Process Control for Microlithography XXIII; 72723D (2009) https://doi.org/10.1117/12.814019
Event: SPIE Advanced Lithography, 2009, San Jose, California, United States

Abstract

Lithography process control becomes increasingly challenging as the design rules shrink. To tackle the issue of identifying the process window for lithography, we systematically compared three different approaches for 45 nm process wafer with two variables: Inspection mode (FEM or PWQ) and Analysis methodology (Manual or Design Based Binning). We found that PWQ + DBB provided the best results.

Citation Download Citation

HoSeong Kang, SooCheol Lee, MinHo Kim, KiHo Kim, YongTeak Jeong, YeonHo Pae, and ChangHo Lee "Comparative study of process window identification methods for 45 nm device and beyond", Proc. SPIE 7272, Metrology, Inspection, and Process Control for Microlithography XXIII, 72723D (23 March 2009); https://doi.org/10.1117/12.814019

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