Paper
17 October 2008 Design for manufacturability guideline development: integrated foundry approach
Hyesung Lee, Yeon-Ah Shim, Jae-Young Choi, Kwang-Seon Choi, Joanne Wu, Bo Su, Xinwei Zhou, Kenny Kim
Author Affiliations +
Abstract
It has been widely accepted that to ensure good yield in IC wafer manufacturing, early adaptation of DFM (Design for Manufacturability) guidelines in design phase is required and it is particularly true in Foundry business. Integrated foundry approaches for DFM guideline development were presented in this paper. With emphasis of process variations and process sensitivity impact on design patterns, we describe the procedure of the combination of rule-based and simulation-based lithographical hotspot pattern characterizations. An evaluation of process sensitivity metrics for analyzing potential pattern hotspots is then described. In addition, based on hotspot pattern severity, repeated patterns from different designs are saved into a pattern library as knowledge deposition tool and those patterns can be easily identified later in new designs through pattern search, which is much faster than simulation based hotspot detections. With this approach, a set of DFM compliance rules is derived to designs in the design implementation stage for both 110nm and 90nm technology nodes, striving to gain more yield, device performance, and improve time-to-volume production.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hyesung Lee, Yeon-Ah Shim, Jae-Young Choi, Kwang-Seon Choi, Joanne Wu, Bo Su, Xinwei Zhou, and Kenny Kim "Design for manufacturability guideline development: integrated foundry approach", Proc. SPIE 7122, Photomask Technology 2008, 712221 (17 October 2008); https://doi.org/10.1117/12.801421
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Cited by 1 scholarly publication.
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KEYWORDS
Optical proximity correction

Design for manufacturing

Nanoimprint lithography

Design for manufacturability

Semiconducting wafers

Lithography

Silicon

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