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As feature sizes continue to the 45nm and 32nm nodes, significant challenges will continue to arise in both
front-end-of-line (FEOL) and back-end-of-line (BEOL) applications. The reduced thickness, as well as the
reduced etch resistance, of the photoresist (PR) makes it nearly impossible to use the PR as both an imaging
and a pattern transfer layer. This etch challenge has led device manufacturers and vendors to explore the
use of multi-layer (trilayer) stacks. Multilayer stacks are typically comprised of a thick via-filling organic
layer that will provide adequate etch resistance while etching into low-k and ultra-low-k dielectrics. A
silicon-containing layer is then applied on top of the via-filling layer, which will provide improved
imaging, as well as etch resistance for the organic layer. The PR is then applied on top to complete the
multilayer stack. While many challenges have presented themselves in multilayer stacks, new challenges
such as rework and cleaning have arisen. As low-k and ultra-low-k dielectrics become more prevalent,
traditional oxygen ashing processes for the removal of PR and anti-reflective coatings can cause damage to
the dielectric layer due to the chemical and physical structures of the materials involved. While some
processes have been developed to replace damaged dielectric material during ashing and etching through
silyation, alternate processes are being developed where entirely wet stripping processes can remove
multilayer stacks. One advantage of an entirely wet removal process is that it can prevent damage caused
by ashing or etching, and the wet stripper is developed so it does not attack the dielectric films. While an
entirely wet removal process has potential advantages, it still must be proven that these processes can
remove residues that are left after etch processes, sufficient removal of particles are obtained, and any
material loss of the dielectric layer meets the requirements of the customer and the International
Technology Roadmap for Semiconductors (ITRS). Other challenges are presenting themselves, as many
customers would like to move from batch-type wet rework or cleaning processes to single wafer tool
processes.
It is the intent of this paper to not only identify new wet cleaning materials that can be used to remove
multilayer materials by means of an entirely wet process, but also to find single wafer tool processes that
produce fewer particles (defects) and cause no dielectric material loss.
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