Paper
21 June 2006 Assist feature placement analysis using focus sensitivity models
Author Affiliations +
Proceedings Volume 6281, 22nd European Mask and Lithography Conference; 62810X (2006) https://doi.org/10.1117/12.692745
Event: 22nd European Mask and Lithography Conference, 2006, Dresden, Germany
Abstract
Sub-Resolution Assist Features (SRAFs) are placed into patterns to enhance the through process imaging performance of critical features. SRAFs are typically placed using complex rules to achieve optimal configurations for a pattern. However, as manufacturing process nodes are growing increasingly complex, the SRAF placement rules will most likely be unable to produce optimal performance on some critical features. A primary impediment to resolving these problems is identifying poorly performing features in an efficient manner. A new process model form referred to as a Focus Sensitivity Model (FSM) is capable of rapidly analyzing SRAF placement for through process pattern performance. This study will demonstrate that an FSM is capable of finding suboptimal SRAF placements as well as missing SRAFs. In addition, the study suggests that the FSM does not need to comprehend the entire photolithography process to analyze SRAF placement. This results in simpler models that can be generated before a manufacturing process enters its development phase.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Lawrence S. Melvin III, Jeffrey P. Mayhew, Benjamin D. Painter, and Levi D. Barnes "Assist feature placement analysis using focus sensitivity models", Proc. SPIE 6281, 22nd European Mask and Lithography Conference, 62810X (21 June 2006); https://doi.org/10.1117/12.692745
Lens.org Logo
CITATIONS
Cited by 1 scholarly publication and 2 patents.
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
SRAF

Manufacturing

Process modeling

Optical lithography

Performance modeling

Semiconducting wafers

Image processing

Back to Top