Review Of Arithmetic Algorithms And Circuits For High Speed Digital Signal Processing

J.Greg Nash

doi:10.1117/12.960502

28 July 1986 Review Of Arithmetic Algorithms And Circuits For High Speed Digital Signal Processing

J.Greg Nash

Proceedings Volume 0614, Highly Parallel Signal Processing and Architectures; (1986) https://doi.org/10.1117/12.960502
Event: O-E/LASE'86 Symposium, 1986, Los Angeles, CA, United States

Abstract

This paper is a review of arithmetic algorithms and circuitry used for VLSI implementation of digital signal processing systems. We also briefly review recent introductions of digital signal processor ICs and provide examples of system specific ICs as well. Performance of the ICs is compared where data is available.

Citation Download Citation

J.Greg Nash "Review Of Arithmetic Algorithms And Circuits For High Speed Digital Signal Processing", Proc. SPIE 0614, Highly Parallel Signal Processing and Architectures, (28 July 1986); https://doi.org/10.1117/12.960502

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