Paper
7 November 2005 Impact of mask CD error on OPC performance for 65nm technology M1 level
Author Affiliations +
Abstract
As lithography pushes to smaller and smaller features under the guidance of Moore's Law, patterned features smaller than the wavelength of light must be routinely manufactured. Lithographic yield in this domain is directly improved with the application of OPC (Optical and Process Correction) to the pattern data. Such corrections generally assume that the mask can reproduce these features exactly. The Mask Error Enhancement Factor (MEEF) serves to amplify mask errors, and can reduce the benefits of OPC in some circumstances. In this paper, we present the characterization of the MEEF for 65nm technology attenuated phase shift mask to figure out how to better set mask specs from an OPC perspective and how to measure the masks relative to these specs and try to figure out new ways to reduce model sensitivity to mask deviations for metal level.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Oseo Park, James Oberschmidt, and Wai-Kin Li "Impact of mask CD error on OPC performance for 65nm technology M1 level", Proc. SPIE 5992, 25th Annual BACUS Symposium on Photomask Technology, 59922Q (7 November 2005); https://doi.org/10.1117/12.630758
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KEYWORDS
Photomasks

Optical proximity correction

Semiconducting wafers

Calibration

Distortion

Critical dimension metrology

SRAF

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