Paper
30 June 2005 A CMOS latched driver using bootstrap technique for low-voltage applications
Author Affiliations +
Proceedings Volume 5837, VLSI Circuits and Systems II; (2005) https://doi.org/10.1117/12.608300
Event: Microtechnologies for the New Millennium 2005, 2005, Sevilla, Spain
Abstract
In this paper, we propose a high performance direct bootstrapped CMOS latched driver circuit (J-driver). It is a 28% faster and occupies a 58% less active area as compared to a counterpart circuit (L-driver) using indirect bootstrap technique. In addition, our driver J-driver reduces the power consumption by a 2% in driving capacitive loads from 1pF to 6pF. The challenge in designing this latched driver is to appropriately trade-off performance against the active area.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jose Carlos Garcia, Juan A. Montiel-Nelson, and Saeid Nooshabadi "A CMOS latched driver using bootstrap technique for low-voltage applications", Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); https://doi.org/10.1117/12.608300
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KEYWORDS
Logic

Transistors

Picosecond phenomena

Capacitance

Capacitors

CMOS technology

Device simulation

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