Paper
28 February 2005 A merged modular/nonmodular multiplier
Author Affiliations +
Proceedings Volume 5649, Smart Structures, Devices, and Systems II; (2005) https://doi.org/10.1117/12.582259
Event: Smart Materials, Nano-, and Micro-Smart Systems, 2004, Sydney, Australia
Abstract
A new hardware architecture is described to perform multiplication and modular multiplication with a modulus of variable wordlength. It is intended for a microprocessor datapath to support efficient implementation of long wordlength operations using the residue number system.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Braden Phillips "A merged modular/nonmodular multiplier", Proc. SPIE 5649, Smart Structures, Devices, and Systems II, (28 February 2005); https://doi.org/10.1117/12.582259
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KEYWORDS
Radon

Field programmable gate arrays

Logic

Binary data

Logic devices

Clocks

CRTs

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