Paper
15 October 2001 Ultrathin wafers: processing and defect issues
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Proceedings Volume 4600, Advances in Microelectronic Device Technology; (2001) https://doi.org/10.1117/12.444658
Event: International Symposium on Optoelectonics and Microelectronics, 2001, Nanjing, China
Abstract
The further increase of the wafer diameter, required for high- volume production of integrated circuits, is combined with an increasing thickness of the wafers. The chip thickness, however, decreases in the same time to about 20 micrometer. Therefore techniques are necessary allowing the thinning of the whole wafer in a time and cost efficient way and with a high accuracy. The actual processing techniques and further trends for wafer thinning are summarized. The most important parameters [final surface structure (roughness), generation of subsurface defects, mechanical stresses] are discussed. Concepts of handling techniques and final processing steps of ultra-thin wafers are presented.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Manfred Reiche "Ultrathin wafers: processing and defect issues", Proc. SPIE 4600, Advances in Microelectronic Device Technology, (15 October 2001); https://doi.org/10.1117/12.444658
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