Paper
24 July 2001 Transformation from C-program to circuitry for a dynamically reconfigurable cell array processor
Takayuki Morishita, Kiyotaka Komoku, Fumihiro Hatano, Iwao Teramoto
Author Affiliations +
Proceedings Volume 4525, Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III; (2001) https://doi.org/10.1117/12.434378
Event: ITCom 2001: International Symposium on the Convergence of IT and Communications, 2001, Denver, CO, United States
Abstract
We have been developing a parallel processor that it is possible to reconfigure hardware according to a software. Dynamic Reconfiguration means to change a kind of and a number of processing elements and connection between processing elements at real time. Our proposed processor creates a very long pipeline, which is able to execute for-loop calculation at very high speed. In this paper, we develop an algorithm which transform automatically a c-language program to a circuit diagram. Especially, we consider processing method of if-sentence and for-sentence and realize high-performance processing of them by a pipeline processing. The automatic transforming program is created by c-language. Finally, we examine a performance of this processor by using a MPEG decoding program.
© (2001) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Takayuki Morishita, Kiyotaka Komoku, Fumihiro Hatano, and Iwao Teramoto "Transformation from C-program to circuitry for a dynamically reconfigurable cell array processor", Proc. SPIE 4525, Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, (24 July 2001); https://doi.org/10.1117/12.434378
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KEYWORDS
Clocks

Parallel processing

Array processing

Algorithm development

Parallel computing

Switches

Neural networks

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