For IR detectors that require cooling to temperatures lower than viable by passive radiative cooling, the mechanical refrigerator is an attractive alternative to expendable cryogen. It provides dramatic reduction in mass, and increased lifetime. For very low noise detectors, there may be some concern that mechanical cooler operation could provide an additional significant detector noise source. Here at LMAATC we have developed a mini-cooler for space borne application, a Stirling compressor driving a pulsetube, and have conducted test to determine if it would induce significant additional noise no cooling a low noise Mie HgCdTe 2D detector array with 3800 nm cutoff. We set up to cool the detector with our mini-cooler, and measure the noise with the cooler running, and with it turned off. We found that cooler operation increased noise barely perceptibly over the cooler off case. We will present implications for our planned space borne instrument, the Source Wave and Propagation Imager. It is an imaging spectrometer that will obtain measurements just below the limb in the 4180 to 4250 nm region of the CO₂ band. Tropospheric production of atmospheric internal gravity waves, and their subsequent propagation through stratospheric will be retrieved from these data.

We have developed a tunable laser-based facility for the absolute radiometric calibration of digital imaging system such as CCD cameras, spectrographs, and microscopes. Several types of silicon-based digital imaging systems have been calibrated in this new facility, including a commercially available camera equipped with a removable photopic filter, a custom-designed digital microscope, and a CCD spectrography. We present result of the CCD camera calibration in detail and discuss relevant aspects of the microscope and spectrograph calibrations. During the radiometric calibration, the pixel-to-pixel uniformity, linearity, and absolute spectral responsivity of each system were determined over the visible spectral range. Each of these aspects of the CCD camera calibration will be presented, along with a discussion of the measurement uncertainties.

With the development of high-speed CMOS imagers, it is possible to acquire and process multiple images within the imager, prior output. We refer to an imaging architecture that acquires a collection of images and produces a single result as multiple capture single image (MCSI). In this paper we describe some applications of the MCSI architecture using a monochrome sensor and modulation light sources. By using active light sources. By using active light sources, it is possible to measure object information in a manner that is independent of the passive illuminant. To study this architecture, we have implemented a test system using a monochrome e CMOS sensor and several arrays of color LEDs whose temporal modulation can be precisely controlled. First, we report on experimental measurement that evaluate how well the active and passive illuminant can be separated as a function of experimental variables, including passive illuminant intensity, temporal sampling rate and modulation amplitude. Second, we describe two applications of this technique: (a) creating a color image from a monochrome sensor, and (b) measuring the spatial distribution of the passive illuminant.

Passive radiative cooling is desirable for space borne detectors because it is generally cheaper, less massive and power consumptive than cooling by a mechanical refrigerator or expendable cryogens. Our interest is space borne nadir imaging the OH airglow in Q-branch features of the 9->6 band at approximately 1382.3 nm, and the 2->0 band at approximately 1434.4 nm with sufficient signal to noise to quantitatively retrieve wave structure. Low noise 256 X 256- 40 micrometer pitch HgCdTe detector arrays are available for our application. E.g., the Rockwell Science Center standard 2.5 micrometers PACE product bonded on to the PICNIC read out MUL satisfies our high sensitive and low read noise requirements, but would require a mechanical refrigerator or expendable cryogen to cool sufficiently to satisfy our dark current requirement. To demonstrate an option that would provide our required performance at viable passive radiative cooling temperature, we have procured examples of the more recent RSC double layer planar heterogenous HgCdTe 2D arrays with shorter wavelength cutoff and produced by molecular beam epitaxy on a CdZnTe substrate, and bonded to the PICNIC MUL. Here we describe our test procedures and results that these at relatively warm temperature, the order 160 to 170K, satisfy the requirements for our OH airglow wave imaging application. We describe an instrument model and observational operations to observe the OH airglow wave structure with signal to noise > 100.

A miniaturized camera utilizing advanced extended dynamic range CMOS APS imager technology and employing real-time histogram equalization has been developed for capturing scenes having high intra-scenic dynamic range. The camera adapts to changes in scene brightness and contrast in two frame periods, and acquires fully processed images in less than 100 milliseconds after power is applied. The BLINC camera contains an automatic exposure time control and is capable of capturing over 8 equivalent f-stops of optical dynamic range. This exposure time control along with programmable extended dynamic range and built-in 12-bit analog to digital converter allows the Sarnoff APS75 CMOS VGA image sensor to accommodate up to 15 f-stops of intra- scenic dynamic range. The APS75 sensor was fabricated with standard CMOS-7 design rules in a 0.5 micron SPTM process. Progressive scan digital video is stored and processed in real-time by an application specific integrated circuit image processor to provide optimal image contrast and exposure. The processed video is then transformed to 10-bits with a proprietary adaptive non-linear mapper before being converted to standard RS-170 analog video. Small size, light weight and low energy consumption make this camera well suited for UAV, and automotive applications.

A CMOS APS Image sensor test chip was designed employing the physical design techniques of enclosed geometry and guard ring, and according to the design rules of a 0.35-micrometers CMOS standard process that has a gate oxide thickness of approximately 7.0 nm. Three sets of radiation tolerant photodiode active pixels were developed employing these design techniques. They are N-type, and H-type pixels. Each of the pixels is a square pixel with a 16.2 micrometers pitch. The yielded fill-factor is approximately 50 percent. Depending on the pixel-type and the layout, the simulated output voltage swing ranges from 300 mV to 1.1 V. The peripheral circuits, which include decoders, row/column drivers, and I/O pads, were also developed. All NMOS transistors in the peripheral circuits were laid out employing the physical design techniques of enclosed geometry and P-type guard ring. Integrating the pixels and the peripheral circuits into the design of radiation hard CMOS APS image sensor has bene completed. The size of the pixel array is 256 by 256, constituting an imaging area of approximately 4.1 mm X 4.1 mm. The total size of the die is approximately 5.2 mm X 5.0 mm. The total number of the I/O pads is 42. Plans to irradiate these image sensor using Cobalt-60 to determine the level of their radiation hardness are currently being devised.

Pixels in an area image sensor are normally arranged in a regular matrix, because this is the best way for sensor layout, display and image processing. Image sensors in CMOS aps technologies offer great flexibility in the design. Nearly any shape for the light-sensitive photodiode and any arrangements are possible. But one disadvantage of CMOS aps is, that they need some space in the sensitive area for the electronic pixel circuitry. We developed and investigated a CMOS sensor with a chessboard like pixel pattern, where the white fields are the sensitive photodiodes and the black fields are for electronic circuitry. The black fields must be interpolated for displaying. So we get an image with a double number of pixels, which is again a regular matrix of pixels which can be displayed on a monitor and is suited for standard image processing. We compared such a chess-pattern sensor with regular matrix image sensors. For this we made some computer simulations of these variations regarding the number of pixels and the optical fill factor. The performance of the images is evaluated concerning technical data, like line-resolution, SFR, artifacts and the visual impression as well. We show simulations with real images of the same scene: Two simulations are with a normal regular pixel arrangement and the other with a sensor having a chess pattern pixel arrangement. Sensor with chess-pattern pixel arrangement can be sued in video-, industrial- and still picture-cameras for black and white and color imaging. It will result in a improved image quality compared to regular matrix sensors.

In this paper we introduce a low fixed pattern noise (LFPN) capacitive transimpedance amplifier (CTIA) for active pixel CMOS image sensors (APS) with high switchable gain and low read noise. The LFPN CTIA APS uses a switched capacitor voltage divider feedback circuit to achieve high sensitivity, low gain FPN, and low read noise. This paper discusses the operation of the LFPN CTIA APS, and presents a theoretical analysis of its gain FPN and read noise. We do not analyze the effect of 1/f noise, since it is typically much smaller than the thermal and shot noise effects. Monte Carlo simulation of gain FPN and SPICE simulation of read noise are also presented. For a 0.35 micrometers CMOS LFPN CTIA at room temperature and an output data rate of 16Mpixel/sec, we show that the pixel amplifier gain FPN is less than 0.0064, where FPN is defined as the ratio of standard deviation to mean. The read noise and dynamic range are less than 3 electrons RMS and greater than 90dB respectively. We find that theory and simulated results match closely.

CMOS image sensors offer over the standard and ubiquitous charge-coupled devices several advantages, in terms of power consumption, miniaturization, on-chip integration of analog- to-digital converters and signal processing for dedicated functionality. Due to the typically higher readout noise of CMOS cameras compared to CCD cameras applications demanding ultimate sensitivity were so far not accessible to CMOS cameras. This paper present an analysis of major noise sources, concepts to reduce them, and results obtained ona single chip digital camera with a QCIF resolution of 144 by 176 pixels and a dynamic range in excess of 120 dB.

An active pixel sensor array (APS) with programmable resolution was realized in standard 0.5 micrometers CMOS technology. For operation under poor lighting conditions, the change of sub-regions of 2 by 2 respectively 4 by 4 pixels can be summed, yielding a corresponding sensitivity enhancement. In that way the maximum resolution of 1024 by 1024 can be reduced to 512 by 512 or 256 by 256. Based on a charge skimming mechanism, the required circuitry can be implemented in any logic CMOS technology without process modifications. Output through 1, 2 or 4 analog channels clocked at a pixel at up to 40 MHz each allows a frame rate up to 160 frames/sec at an overall power dissipation of 70 mW.

A lot of studies have already ben realized on CMOS Image sensor but a few of them deals about the improvements which can be done to the commonly used pixel architecture. While this architecture of 3 or 4 transistors is very stable and has proved many times its efficiency, it still suffers form some weaknesses, in particular concerning the reduction of diode capacitance and the improvements which can be made on fixed pattern noise. This paper present studies and test results on some possible pixel architectures, and their characteristics. A 256 by 256 chip has been fabricated and its test showed the way of the study of a new high performance APS pixel.

A family of monochrome, high-speed linear imagers has been developed with each device to be available as a single chip fabricated using a standard commercially available CMOS process. Currently, the 2048 pixel device has been fabricated using a 0.5-micron CMOS process and its architecture, functionality and performance is described. The family of imagers features a unique combination of high functional integration, very high speed, low dark current, high sensitivity and high pixel-to-pixel uniformity. The pixels are 7.0 microns by 7.0 microns and have 100 percent fill factor. The high pixel-pixel uniformity is made possible by using low dark current pixels, a correlated double sampler circuit per pixel and a fully differential video bus. High functional integration is enabled by on-chip logic that is provided to minimize support circuitry and simplify application. Included are several exposure modes that provide full-frame electronic shutter, independent control of integration time and simultaneous integration and read-out. Only 5 volts DC and clock signal running at twice the desired pixel rate are required for basic operation. Low dark current and high sensitivity result from a novel pixel and low-noise preamplifier structure. A novel video multiplexing structure provides the very high read-out speed of 60 Mpixel/sec per 2048 pixel segment while sustaining an MTF of 50 percent at 35 line pairs per millimeter.

We present some design details and characterization results for a VGA CMOS image sensor designed for high sped inspection applications. The sensor has 16 analog outputs, which can each operate at 50 MHz data rate, and can capture images at 1600 frames per second. The image sensor has exposure control functionality, antiblooming capability and a on-rolling shutter architecture to implement snap-shot image capture mode. The pixel architecture incorporates 5 transistors on a 15.3 micron pitch with 50 percent fill factor.

The AR chip is a versatile CMOS image sensor, functions are not only normal image acquisition but also on-chip image processing. Such features can accelerate algorithms of image processing and the controls of proper image. We have developed the low-cost and compact vehicle detection system using he AR chips. The system is composed of a processing module and an AR camera module. The AR Camera module has dual artificial retina chips to cover the wide dynamic range of the outdoor brightness environment. The ND filter is coated on the lens of one of the chips, each AR chip covers different range of the brightness. The control algorithm of image acquisition is designed to select an adequate chip based on the image quality. The images of the selected chip are processed by on-chip functions for pre-processing and they are transferred to the processing module. Finally the processing module judges the existence of vehicles and detects several kinds of attributive information of the detected vehicle such as moving direction. In our paper, we describe details of the system and the algorithm and we show several result data through field experiments under the real road environment.

This paper presents a CMOS active pixel image sensor (APS) with a transversal readout architecture that eliminates the vertically striped fixed pattern noise (FPN). There are two kinds of FPNs for CMOS APSs. One originates form the pixel- to-pixel variation in dark current and source-follower threshold voltage, and the other from the column-to-column variation in column readout structures. The former may become invisible in the future due to process improvements. However, the latter, which result sin a vertically striped FPN, is and will be conspicuous without some subtraction because of the correlation in the vertical direction. The pixel consists of a photodiode, a row- and a column-reset transistor, a source follower input transistor, and a column-select transistor instead of the row-select transistor in conventional CMOS APSs. The column-select transistor is connected to a signal line, which runs horizontally instead of vertically. Every horizontal signal line is merged into a single vertical signal line via a row- select transistor, which can be made large enough to make its on-resistence variation negligible because of its low driving frequency. Therefore, the sensor has neither a vertical nor horizontal stripe FPN.

Color images are commonly captured with sensor arrays covered with a mosaic of RGB-filters. In spite of the enormous success of CMOS and CCD color cameras, one-chip color imagers suffer form color aliasing or color moire effects. In order to overcome these limitations we have realized color sensors based on vertical integrated thin film structures. The compete color information of the color aliasing free sensor can be detected at the same position of a sensor array without optical filters. The color separation is realized by the wavelength dependent absorption int eh depth of the material. The thin film systems based on amorphous two terminal deices and stacked diodes are fabricated by a low temperature CVD process. The spectral sensitivity of the sensors can be controlled by the optical and optoelectronic properties of the material son one hand and the design of the devices on the other hand. The working principle of thin film sensors will be presented and the different detection concepts will be compared regarding their application in color recognition and digital imaging.

We present in this paper a programmable silicon retina designed for real-time pattern recognition. Its working principle is based on the comparison between an image projected on the retina by some opt9ical means and a reference binary image or mask memorized in the circuit. The result of the comparison is two signals corresponding to the sum of the currents produced by the pixels pertaining to the black and white zones of the reference binary image, this image when projected on the retina will produce a maximum white pixel current and a minimum black pixel current if it coincides perfectly with the reference binary image. If the projected image is shifted with respect to the reference binary image or if it is different then the black and white pixel currents will be different also. By measuring these two currents and by comparing them to expected values, a shift of the pattern or a difference between the observed and programmed pattern can be detected. Extensive computer simulations have been done in order to validate the working principle of the retina. Moreover, in order to verify the feasibility of the circuit in CMOS technology, we have fabricated a prototype non-programmable circuit in 1.2 micrometers standard CMOS technology. The measurements done on this circuit are quite encouraging and have been found to correspond to our expectations. Finally, the architecture of the programmable silicon retina, designed in a more recent 0.6 micrometers CMOS technology, is presented. This circuit is currently being fabricated.

A new CCD sensor technology has been developed by Marconi Applied Technologies which effectively reduces read-out noise to less than one electron rms. A single low light level CCD can operate over a wide range of read-out rates from TV to slow-scan and give superior performance to that available from either intensified or slow-scan CCD sensors.

The New Super-HARP image sensor, which relies on avalanche multiplication in a photoconductive film made mainly of amorphous selenium, is ultra-high sensitive. The sensor has already ben used to film very dark scenes, however in such a situation, shot noise due to the quantum characteristics of light becomes a serious problem. Increasing the quantum efficiency of the image sensors can reduce shot noise. The quantum efficiency of the New Super-HARP sensor has been improved to obtain an even better picture. To increase the quantum efficiency for green incident-light two improvements have been made to the amorphous selenium film. The first is doping the film with a suitable amount of tellurium on its incident-light side. The sensor is reducing the lithium- fluoride-doped layer to about 60 percent of the thickness of the conventional film. The improved version of the New Super-HARP Film has higher quantum efficiency. Its quantum efficiency at a wavelength of 540 nm was evaluated to be double that of the conventional film. Shot noise is reduced by three dB, that is, the S/N is improved by three dB.

The University of Arizona Imaging Technology Laboratory has processed 4096 X 4096 15-micron Charge Coupled Devices (CCDs) fabricated at Lockheed Martin Fairchild Systems for back illuminated scientific applications. The devices have been optimized for astronomical observations in a direct imaging mode. Three types of back illuminated devices have been developed. The oldest devices are CCD4096JJ detectors which were custom fabricated for astronomical applications. The CCD485 devices are commercial sensors, originally fabricated for digital photography and medical applications. Because no frontside ground contact was included on either device, a backside contact was developed and applied as part of the backside processing. With this addition, very high quality back illuminated sensors have been developed. The CCD486 is a newer version of the 4k by 4k CCD with low noise amplifiers and a backside contact. These sensors have now been produced back illuminated with > 90 percent QE and read noise under 4 electrons. The devices show CTE of > 0.999998. Back illuminated versions CCDs have been fabricated with peak-valley flatness non-uniformity of less than 10 microns. A new epoxy underfill technique was developed to achieve this flatness and to avoid underfill voiding during epoxy application and curing. The new method applies a contact force on the CCD during the entire 48 hour cycle.

We have developed an experimental progressive-scanning color camera system that has three 2/3-inch-2M-pixel-CCDs. A multiple frame interline transfer CCD was used because its structure enables the charges of each pixel to be handled separately. This CCD has 1,920 X 1,036 active imaging pixels and it was successfully driven at 148.5 MHz to reproduce sixty frames a second of a progressive-scanned picture. The limiting resolution was 1,000 TV lines in both the horizontal and vertical directions.

The recent interest in detecting asteroids and Reentrant Space Debris has developed a need for large field of view, high-resolution focal plane array cameras to provide for mapping and tracking of these objects. Ideally, a number of these cameras would be used around the world to provide a compete sky map. The Japan Space Forum is currently constructing one such facility in Japan. This paper is an update to the construction of tow cameras for the SJHF Bisei Spaceguard Facility. The camera for the 0.5 meter telescope has been installed and is operation. The camera for the 1.0 meter telescope is scheduled to be completed in June of 2001.

An important trend in the design of digital cameras is the integration of capture and processing onto a single CMOS chip. Although integrating the components of a digital camera system onto a single chip significantly reduces system size and power, it does not fully exploit the potential advantages of integration. We argue that a key advantage of integration is the ability to exploit the high speed imaging capability of CMOS image senor to enable new applications such as multiple capture for enhancing dynamic range and to improve the performance of existing applications such as optical flow estimation. Conventional digital cameras operate at low frame rates and it would be too costly, if not infeasible, to operate their chips at high frame rates. Integration solves this problem. The idea is to capture images at much higher frame rates than he standard frame rate, process the high frame rate data on chip, and output the video sequence and the application specific data at standard frame rate. This idea is applied to optical flow estimation, where significant performance improvements are demonstrate over methods using standard frame rate sequences. We then investigate the constraints on memory size and processing power that can be integrated with a CMOS image sensor in a 0.18 micrometers process and below. We show that enough memory and processing power can be integrated to be able to not only perform the functions of a conventional camera system but also to perform applications such as real time optical flow estimation.

Mosaic imagers increase field of view cost effectively, by connecting single-chip cameras in a coordinated manner equivalent to a large array o9f sensors. Components that would conventionally have been in separate chips can be integrated on the same focal plane by using CMOS image sensors (CIS). Here, a mosaic imaging system is constructed using CIS connected through a bus line which shares common input controls and output(s), and enables additional cameras to be inserted with little system modification. The image- bus consumes relatively low power by employing intelligent power control techniques. However, the bandwidth of the bus will still limit the number of camera modules that can be connected in the mosaic array. Hence, signal-processing components, such as data reduction and encoding, are needed on-chip in order to achieve high readout speed. One such method is described in which the number and sizes of pixel clusters above an intensity threshold are determined using a novel 'object positioning algorithm' architecture. This scheme identifies significant events or objects in the scene before the camera's data are transmitted over the bus, thereby reducing the effective bandwidth. In addition, basic modules in single-chip camera are suggested for efficient data transfer and power control in mosaic imager.

A CMOS-Liquid Crystal-Based Image Transceiver Device (ITD) is under development at the Holon Institute of Technology. The device combines both functions of imaginary and display in a single array structure. This unique structure allows the combination of see-through, aiming, imaging and the displaying of a superposed image to be combined in a single, compact, head mounted display. The CMOS-based pixel elements are designed to provide image sensor part of the pixel is based on an n-well photodiode and a three-transistors readout circuit. The imaging function is based on a back- illuminated sensor configuration. In order to provide a high imager fill-factor, two pixel configuration are proposed: 1) A p++/p^-/p-well silicon structure using twin- well CMOS process; 2) an n-well processed silicon structure with a micro-lens array. The display portion of the IT device is to be fabricate don a silicon-based reflective, active matrix driver, using nematic liquid crystal material. The reflective display pixel electrode is driven by an n-MOS transistor, formed in the corresponding pixel region on the silicon substrate. The timing, sequencing and control of the IT device array are designed in a pipeline array processing scheme. A preliminary prototype system and device design have been performed and the first test device is currently being tested. Details of the device design as well as its smart goggle applications are presented.

Satellite based scientific studies of the upper atmosphere are most effectively pursued by remote sensing techniques using spectral imaging from orbit. Observing in the orbital plane towards the limb 1D intensity profiles are collected and inverted into luminosity distributions. In most studies only a few key spectral regions are of interest and the maximization of the signal to noise ratio within these regions ins of prime importance. A novel instrument is described in which the spectral separation of the radiation is accomplished by using strip filters instead of a diffraction grating and the vertical intensity profile of the atmosphere is imaged on the strip filter by a special optical system incorporating cylindrical lens elements. The optical system has high resolution imaging in the vertical direction and has a well-defined field of view in the horizontal field of view is rejected. By adjusting the width of the filter strips it is possible to adjust the signal to noise ratio of each wavelength channel. The filters are in a telecentric position for minimizing their spectral pass- band. The spectral resolution is limited only by the filter elements and it is not restricted by spectral slit width considerations. The instrument performance is compared to an equivalent size grating instrument.

We introduce a new type of integrated imaging sensor that detects multispectral and polarimetric signatures in an IR scene. The sensor is a stack consisting of an IR detector array, and an array of multispectral and polarimetric filters. In this first phase of the research, we fabricated multispectral filters for the 3-5 micron waveband don sapphire substrates and polarimetric filters on silicon substrates. These were characterized separately and in mechanical contact as a single unit. The transmission characteristics of both filters show excellent agreement with the theoretical result. Whenthe filters are integrated into an imaging sensor, such a sensor is anticipated to improve image contrast with sensor-fusion post processing. In addition, it will offer portability and robustness because of its integrated nature.

Upper atmospheric winds have been measured for many year by the detection of the Doppler shifts of airglow emission lines using both Fabry-Perot and Michelson interferometers. The Michelson is usually used in a field-widened configuration with the path difference set at a large value. Filters isolate a single emission line and the Doppler shifts are manifested as phase shifts of the interferometric fringes. The phase shifts are measured by sampling the fringe at four points separated by about one-quarter wavelength in path difference. One problem with the technique is that the phase is subject to error if the source intensity varies while the four exposures are made. A solution is to divide one Michelson mirror into four quadrants, with a different coating on each quadrant, in order to provide the four fringe samples simultaneously. This method is proposed for WAMI, the Michelson instrument in the WAVES proposal. The technique of sampling a fringe at four points simultaneously while imaging is discussed and demonstrated. A laser source is Doppler shifted using a spinning disk and the velocities measured interferometrically agree with the known speed of the disk within statistical error.

As medical imaging is adapting to the digital technology, solid imaging sensors are replacing the classical films in dental application. CCD is one of the typical image senors in this are. In the oral imaging, however, the size of image sensors should be large because there is not enough space for optical path of lens inside the mouth. The unavoidable defects are usually occurred in the large format CCD sensor. Practically it is not possible to get the defect free sensor because its cost is rapidly increasing to reduce the defects. In this paper we will present an efficient strategy to handle these defects. As the lighting is highly controllable differently from the common cameras, the controlled illumination is used to create uniform images with various levels. The local statistics in each controlled image are investigated to find defected areas. All the defected regions of each image are accumulated forming image-like representation. The defected regions are concealed with their neighbors by linear interpolation.

Fully integrated imaging receivers present a method of low power free-space optical communication with advantages over radio frequency and single element optical communication for a variety of network scenarios. This paper discusses the theoretical performance of such receivers and the design of a single 'smart pixel' for use in a 2.5 Mbps integrated CMOS imaging receiver. The receiver has a simulated input referred noise power of -51 dBm and a dynamic range greater than 30 dB when operating at 2.5 Mbps. Power consumption is less than 50 (mu) W and the pixel fits on a 150 micrometers pitch in a standard 0.35 micrometers digital CMOS process, readily allowing fabrication of inexpensive imaging arrays as large as 64 by 64 pixels. Th receiver presented covers all aspects of reception from optical detection through A/D conversion. An asynchronous digital serial receiver could decode the resulting data stream from this receiver. A low overhead architecture for communicating decoded data packets form any pixel in the imaging array to the edge of the chip is briefly described.

Inspired by biological information scheme, pulse frequency modulation (PFM) technique is robust for noise sources due to its digital encode of analog signals. In a viewpoint of image sensors, PFM is also useful for a wide dynamic range and has already been demonstrated over 60 dB. We have designed a pixel circuit of a CMOS image sensor using PFM for the next generation architecture of vision chips. The chip is fabricated using a standard 0.35 micrometers double poly, triple metal CMOS technology. The photodiode is a parasitic pn diode between p-well and n-diffusion with the size of 2 micrometers squares. The top of the photodiode is covered with third metal and 1 micrometers square hole is open for aperture. Feedback circuits consist of a Schmitt trigger and two inverters. We have demonstrated by introducing PFM the chip works well under the power supply voltage of 0.55V with 50 dB. Such a low voltage operation suggests deep sub-micron technologies, for example, 0.18 micrometers technologies could be applied to the sensor. The other important point in our chip is that the photodiode is very small in size of 2 micrometers by 2 micrometers with the aperture size of 1 micrometers by 1 micrometers . This enables us to realize an image sensor with a small fill factor, which is very useful for vision chips where functional circuits are integrated in each pixel.

In this paper the design considerations for a digital dental x-ray system is discussed where a commercial CCD sensor is adopted. Especially the system should be able to work with several x-ray machines even with them for the classical film. The hardware-software co-design methodology is employed to optimize the system. The full digital implementation is assumed for the reliability of the system. The considered functions cover the pre-processing such as the exposure detection, clamping and the dark level correction and the post-processing such as gray level compensation. It is analyzed with some other constraints in order to make the final partition. The entire system based on the partition will be described.

Professional and consumer digital photography cameras use either CCD or CMOS sensors. Both of these sensors are fabricated using crystalline silicon technology. The advantage of this technology is that the pixel sizes can be made relatively small with resolutions approaching that of conventional photographic film. The disadvantage is that the active area is limited by the size of the silicon wafers, thereby making large format photography difficult. A new class of sensor using amorphous silicon on glass has bene developed for the medical field of radiography, fluoroscopy, and mammography. These pixilated devices have a thin-film- transistor (TFT) switch coupled to a photodiode or storage capacitor located at each pixel. Devices with 70 micrometers pixel pitch and nominally 10 inch by 12 inch active area are under development. Results are presented on a 14 inch by 17 inch TFT-based large area sensor with a pixel pitch of 139 micrometers and a prototype 512 by 512 pixel device with a 70 micrometers pitch. Characterizations include linearity, dynamic range, input-output transfer characteristics and resolution. Advantages and limitations of this technology for large format photography will be discussed.

Efforts to construct end-to-end color reproduction systems based on the preservation of scene spectral data have been underway at the Munsell Color Science Laboratory. The goal is to present hardcopy results which are spectrally matched to original colors. The evaluated approach consists of capturing scenes through a trichromatic digital camera combined with multiple filterings followed by an image processing stage and then four-color printing. The acquisition end is designed to estimate original scene spectra on a pixel-by-pixel basis based on system characteristics which takes into account the camera sensitivities as modulated by the filterings followed by an image processing stage and then four-color printing. The acquisition end is designed to estimate original scene spectra on a pixel-by-pixel basis based on system characterizations which takes into account the camera sensitivities as modulated by the filterings an scene colorant make-up. The spectral-based printing used in this research is able to produce the least metameric reproduction to the original scene using a computationally feasible approach. Results show a system accuracy of mean (Delta) E^*94 of 1.5 and spectral reflectance rms error of 0.9 percent.

This article presents the design and realization of a CMOS digital image sensor optimized for button-battery powered applications. First, a pixel with local analog memory was designed, allowing efficient sensor global shutter operation. The exposure time becomes independent on the readout speed and a lower readout frequency can be used without causing image distortion. Second, a multi-path readout architecture was developed, allowing an efficient use of the power consumption in sub-sampling modes. These techniques were integrated in a 0.5 um CMOS digital image senor with a resolution of 648 by 648 pixels. The peak supply current is 7 mA for a readout frequency of 4 Mpixel/s at Vdd equals 3V. Die size is 55 mm2 and overall SNR is 55 dB. The global shutter performance was demonstrated by acquiring pictures of fast moving objects without observing any distortion, even at a low readout frequency of 4 MHz.

In order to design and realize multiple wavelength bandpass filters for image sensors, we have investigated optical multi-layer dielectric filters. The filter design is based on a chirped Bragg grating which is approximated by a stack of two alternatively deposited dielectric materials. Multi- layer stacks have been simulated with the rigorous chain- matrix method. The reflection and transmission coefficients of the stacks have been obtained by the multiplication of the respective 2 by 2 characteristics matrices of each layer. Moreover the period and chirping of the discrete chirped of the discrete chirped Bragg gratings have been optimized to match the blue spectral response. The filter band has been designed to transmit the 400-500nm wavelengths and to reflect the other visible spectrum wavelengths. Single layers of silicon oxide and silicon nitride have been deposited using a PECVD process. The characterization of these layers have been made by ellipsometry, and has led to a modification of the nitride deposition process to improve its optical characteristics. The compete stack has been deposited on a quartz substrate, and the reflectance and the transmittance have been measured. The next step is to improve the deposition process.

Single-sensor digital cameras spatially sample the incoming image using a color filter array (CFA). Consequently, each pixel only contains a single color value. In order to reconstruct the original full-color image, a demosaicing step must be performed which interpolates the missing colors at each pixel. Goals in CFA demosaicing include color fidelity, spatial resolution, no false colors, no jagged edges, and computational practicality. Most demosaicing algorithms do well for color fidelity, but there is often a trade-off between a sharp image and the so-called 'zipper effect' or jagged edge look. We propose a novel demosaicing algorithm called vector demosaicing that interpolates missing colors jointly by selecting the color vector that minimizes the sum of distances to the surrounding pixels. The selected color vector is a vector median of the surrounding pixels. The vector median forms an 'average', but preserves sharp edges. We will discuss the theory behind our approach and show experimentally how the theoretical advantages manifest themselves to improve edge resolution while retaining smoothness. Computational complexity is shown to be possible quite low, and we discuss how different approximations may affect the output.

Image compression is needed to communicate image effectively. Especially, mobile communication needs high compression. It also needs high error tolerance because highly compressed data re strongly influenced by transmission errors. We found that the relation between the range block and domain block can also be applied well to the extended range blocks and domain blocks in most cases in fractal coding based on Iterated Function System. We use this feature of fractal coding and propose a new robust coding scheme, which has good error tolerance. We perform the fractal compression experiments based on the prosed scheme to verify the effectiveness of this scheme. Computationally experiments show that it has nearly the same performance as conventional scheme when errors do not occur and achieve large improvement of image quality without increasing the amount of the data when errors occur.

In this paper an image enhancing technique is described. It is based on Shunting Inhibitory Cellular Neural Networks. As the limitation of the linear approaches to image coding, enhancement, and feature extraction became apparent, research in image processing began to disperse into the three goal-driven directions. However SICNNs model simultaneously addresses the three problems of coding, enhancement, and extraction as it acts to compress the dynamic range, reorganize the signal to improve visibility, suppress noise, and identify local features. The algorithm we are describing is simple and cost-effective, and can be easily applied in real-time processing for digital still camera application.

This paper presents a new pixel slide method using optical deices for digital still cameras with a single-CCD to achieve high resolution. Authors have developed a new pixel- slide method using a double-refraction plate, a liquid crystal plate and a polarization filter, which takes advantage of the fact that a double-refraction plate has different indexes of refraction depending on the polarization direction. In addition, they have developed a ne color interpolation method to create a highly precise image form two images shifted by 1/2 pixel. The interpolation is conducted utilizing the color correlation. When a VGA- compatible CCD was employed in a digital still camera, resolution of 800 lines was obtained by using the proposed method. When an SXGA-compatible CCD was used, resolution of 1600 lines was obtained.

In this paper we investigate the influence of motion sensor errors on the derivation of the MTF and its implementation in image restoration. We present an analytical approach for estimating the vibration MTF from the measured system MTF by the frequency response of the sensor and their noise data. The goal of this research is to describe an automatic system of restoration of pictures blurred by vibration, and to consider its possible disadvantages. Our method is based on point-spread function verification by the data of motion sensor characteristics. We build an analytical model of the sensor and compare the MTF after sensor errors caused by noise of the system and wrong axis direction of the restoration device. Here, we assume that noise and signal are independent and noise of the system is white Gaussian noise. Some image restoration of degraded images is presented based on improvements of the original wiener filter. We compare performance of inverse and wiener filter operations and consider the dependence of restoration quality on the signal to noise ratio and angel between restoration axis and true vibration direction. There is an interesting and useful relationship in the final graphs. This article brings us to improvement of the initial method, as seen from our simulation. Some restorations of degraded images are presented based on improvements of the original wiener filter. The key to the restoration is determination of the improved optical transfer function unique to the image vibration and sensor characteristics.

In this paper we will describe the design, construction and application of a wearable digital imaging project based on the PC/104 embedded PC board. The systems for image capture, manipulation and communication will be presented and power- consumption, heat dissipation and user-interface design will be considered. The paper will also discuss the results of an archaeological field trial and demonstrate the potential of image sequence tagging methods for efficient data retrieval in documentary applications.

The competition in the exploding digital photography market has caused vendors to explore new ways to increase their return on investment. A common view among industry analysts is that increasingly it will be services provided by these cameras, and not the cameras themselves, that will provide the revenue stream. These services will be coupled to e- Appliance based Communities. In addition, the rapidly increasing need to upload images to the Internet for photo- finishing services as well as the need to download software upgrades to the camera is driving many camera OEMs to evaluate the benefits of using the wireless web to extend their enterprise systems. Currently, creating a viable e- appliance such as a digital camera coupled with a wireless web service requires more than just a competency in product development. This paper will evaluate the system implications in the deployment of recurring revenue services and enterprise connectivity of a wireless, web-enabled digital camera. These include, among other things, an architectural design approach for services such as device management, synchronization, billing, connectivity, security, etc. Such an evaluation will assist, we hope, anyone designing or connecting a digital camera to the enterprise systems.

CMOS image sensors have benefitted from technology scaling down to 0.35 micrometers with only minor process modifications. Several studies have predicted that below 0.25 micrometers , it will become difficult, if not impossible to implement CMOS image sensors with acceptable performance without more significant process modifications. To explore the imaging performance of CMOS Image sensors fabricated in standard 0.18 micrometers technology, we designed a set of single pixel photodiode and photogate APS test structures. The test structures include pixels with different size n+/pwell and nwell/psub photodiodes and nMOS photogates. To reduce the leakages due to the in-pixel transistors, the follower, photogate, and transfer devices all use 3.3V thick oxide transistors. The paper reports on the key imaging parameters measured from these test structures including conversion gain, dark current and spectral response. We find that dark current density decreases super-linearly in reverse bias voltage, which suggest that it is desirable to run the photodetectors at low bias voltages. We find that QE is quite low due to high pwell doping concentration. Finally we find that the photogate circuit suffered from high transfer gate off current. QE is not significantly affected by this problem, however.

CMOS image sensors generally suffer form lower dynamic range than CCDs due to their higher readout noise. Their high speed readout capability and the potential of integrating memory and signal processing with the sensor on the same chip, open up many possibilities for enhancing their dynamic range. Earlier work have demonstrated the use of multiple non-destructive samples to enhance dynamic range, while achieving higher SNR than using other dynamic range enhancement schemes. The high dynamic range image is constructed by appropriately scaling each pixel's last sample before saturation. Conventional CDS is used to reduce offset FPN and reset noise. This simple high dynamic range image construction scheme, however, does not take full advantage of the multiple samples. Readout noise power, which doubles as a result of performing CDS, remain as high as in conventional sensor operation. As a result dynamic range is only extended at the high illumination end. The paper explores the use of linear mean-square-error estimation to more fully exploit the multiple pixel samples to reduce readout noise and thus extend dynamic range at the low illumination end. We present three estimation algorithms: (1) a recursive estimator when reset noise and offset FPN are ignored, (2) a non-recursive algorithm when reset noise and FPN are considered, and (3) a recursive estimation algorithm for case (2), which achieves mean square error close to the non-recursive algorithm without the need to store all the samples. The later recursive algorithm is attractive since it requires the storage of only a few pixel values per pixel, which makes its implementation in a single chip digital imaging system feasible.

A measurement program designed to investigate the variations in sensitivity of focal plane array son a sub-pixel scale has produced such information for two devices: a two-phase front-illuminated CCD and a three-phase back-illuminated CCD. The effect of a non-uniform pixel response on a aperture photometry has been previously analyzed for a front-illuminated CCD. This paper presents results regarding the photometric errors to be expected for a back-illuminated CCD and astrometric errors for both devices. The uncertainty introduced in both measurements, when using under sampled data, is significant.

A digital programmable artificial retina (PAR) is a functional extension of a CMOS imager, in which every pixel is fitted with a local ADC and a tiny digital programmable processor. From an architectural viewpoint, a PAR is an SIMD array processor with local optical input. A PAR is aimed at processing images on-site until they can be output from the array under concentrated form. The overall goal is to get compact, fast and inexpensive vision systems, in particular for robotics applications. A 256 by 256 PAR with up to a few tens bits of local memory per pixel is now within reach at reasonable cost. However, whereas the local memory size benefits quadratically from the feature size decrease, wiring density improvement can only be linear, at best. So control should become more complex with the danger of a growing proportion of the digital pixel area being devoted to instruction or address decoding. We propose efficient scalable solutions to this problem at the architectural, circuit and topological levels, which attempt to minimize both silicon area and power consumption.

Results from investigation of the characteristics of a high- speed IR-photorecorder based on the ionization-type IR- camera KIT-2F and CCD-camera are presented. The photorecorder operate in the spectral range 1-10 micrometers with the frame exposure length of 1-100microsecond(s) , IR radiation detection threshold of 10^-6 J/cm² and spatial resolution of > 10⁴ elem./frame. The photorecorder may be used for recording the structure of thermal fields in fast processes: in gas dynamics, ballistics, motor and aircraft building, pulsed welding and thermal treatment of surfaces, in powerful pulsed electric facilities et al. and for control of the IR laser radiation spatial characteristics.

A radically new CCD development by Marconi Applied Technology has enabled substantial internal gain within the CCD before the signal reaches the output amplifier. With reasonably high gain, sub-electron readout noise levels are achieved even at MHz pixel rates. This paper reports a detailed assessment of these devices, including novel methods of measuring their properties when operated at peak mean signal levels well below one electron per pixel. The devices are shown to be photon shot noise limited at essentially all light levels below saturation. Even at the lowest signal levels the charge transfer efficiency is good. The conclusion is that these new deices have radically changed the balance in the perpetual trade-off between read out noise and the speed of readout. They will force a re- evaluation of camera technologies and imaging strategies to enable the maximum benefit to be gained form these high- speed, essentially noiseless readout devices. This new LLLCCD technology, in conjunction with thinning should provide detectors which will be very close indeed to being theoretically perfect.

The paper describes the design, operation, and performance of integrated CMOS imagers that withstand multi-megarad(Si) total dose of ionizing radiation. It reports test result from two imagers - one with on-chip integrated timing and control, and the other with a variety of pixel structures for parametrically investigating the effects of radiation ion imager performance. The CMOS Imager has been shown to response only to ionizing radiation, and is able to withstand high proton fluence. Minimal change in imager performance is observed after being subjected to a proton fluence of 1.2 X 10¹² protons/cm². The imager also exhibits minimal change in optical response after being dosed with 1.5 Megarad(Si). The radiation-induced dark current ins small and is well-behaved over the entire dose range. No change in operation bias is needed either for operating the imager at low-temperature or after irradiation. The parametric test chip indicates that the LOCOS region plays a significant role in determining the total-side-hardness of the pixel. Based on test results, most promising pixel structures for imaging under high radiation environments have been identified.