Fast wafer-level detection and control of interconnect reliability

Sean Foley; James Molyneaux; Alan Mathewson

doi:10.1117/12.410075

23 August 2000 Fast wafer-level detection and control of interconnect reliability

Sean Foley, James Molyneaux, Alan Mathewson

Proceedings Volume 4182, Process Control and Diagnostics; (2000) https://doi.org/10.1117/12.410075
Event: Microelectronic Manufacturing, 2000, Santa Clara, CA, United States

Abstract

Many of the technological advances in the semiconductor industry have led to dramatic increases in device density and performance in conjunction with enhanced circuit reliability. As reliability is improved, the time taken to characterize particular failure modes with traditional test methods is getting substantially longer. Furthermore, semiconductor customers expect low product cost and fast time-to-market. The limits of traditional reliability testing philosophies are being reached and new approaches need to be investigated to enable the next generation of highly reliable products to be tested. This is especially true in the area of IC interconnect, where significant challenges are predicted for the next decade. A number of fast, wafer level test methods exist for interconnect reliability evaluation. The relative abilities of four such methods to detect the quality and reliability of IC interconnect over very short test times are evaluated in this work. Four different test structure designs are also evaluated and the results are bench-marked against conventional package level Median Time to Failure results. The Isothermal test method combine with SWEAT-type test structures is shown to be the most suitable combination for defect detection and interconnect reliability control over very short test times.

Citation Download Citation

Sean Foley, James Molyneaux, and Alan Mathewson "Fast wafer-level detection and control of interconnect reliability", Proc. SPIE 4182, Process Control and Diagnostics, (23 August 2000); https://doi.org/10.1117/12.410075

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