Paper
5 July 2000 Method of expanding process window for the double exposure technique with alt-PSMs
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Abstract
For the fine patterning of gate layers on embedded DRAM is logic devices with a design rule of 0.13 micrometers and below, we have optimized the double exposure technique with an alternative phase shifting mask using KrF excimer laser exposure. Based on the study over lithography process latitude with respect to exposure-defocus window, overlay margin and mask fabrication feasibility, we have adopted a process as that patterns in logic circuits are delineated by the combination of alt-PSM and a trim mask made of Cr shielding patterns on an attenuated phase shifting mask, while patterns in DRAM cells are delineated by the latter att-PSM exposure only. With considering a mask error enhancement factor, optical condition and optical proximity effect correction for the alt-PSM and trim mask are also optimized, then, 0.13 micrometers embedded DRAM in logic patterns have been fabricated with a sufficient common lithography process window by the KrF excimer laser exposure.
© (2000) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Koji Kikuchi, Hidetoshi Ohnuma, and Hiroichi Kawahira "Method of expanding process window for the double exposure technique with alt-PSMs", Proc. SPIE 4000, Optical Microlithography XIII, (5 July 2000); https://doi.org/10.1117/12.388947
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CITATIONS
Cited by 2 scholarly publications and 45 patents.
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KEYWORDS
Photomasks

Logic

Optical proximity correction

Binary data

Chromium

Critical dimension metrology

Lithography

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