Mainstreaming SOI CMOS technology

Ghavam G. Shahidi

doi:10.1117/12.360562

1 September 1999 Mainstreaming SOI CMOS technology

Ghavam G. Shahidi

Proceedings Volume 3881, Microelectronic Device Technology III; (1999) https://doi.org/10.1117/12.360562
Event: Microelectronic Manufacturing '99, 1999, Santa Clara, CA, United States

Abstract

Partially-depleted deep sub-micron CMOS on SOI technology is becoming a mainstream technology. This technology offers 20- 35 percent performance gain over a bulk technology implemented with the same tool set. In this paper, first a review of the SOI technology is given. Next, the partially- depleted SOI device and the reasons why it was chosen over fully depleted SOI device are reviewed. The sources of performance gain on SOI, and SOI-unique circuit issues that a designer must consider and account are discussed next. Finally, a low-power application of SOI is reviewed.

Citation Download Citation

Ghavam G. Shahidi "Mainstreaming SOI CMOS technology", Proc. SPIE 3881, Microelectronic Device Technology III, (1 September 1999); https://doi.org/10.1117/12.360562

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