The semiconductor industry is continually moving towards more complex processor designs. The new chips occupy bigger areas and surface properties of silicon wafers used in manufacturing, such as PV and RMS, become critical. One of most important characteristics of wafers is their site flatness, defined as height parameters over area occupied by the projected semiconductor chip. Smaller critical dimensions, shorter wavelength, and higher numerical aperture steppers impose more stringent requirements on PV and RMS of the site's profile. As the wafer goes through the manufacturing process, its value increases, so detecting defective sites is essential to lowering the production costs. To resolve this problem Veeco Process Metrology has designed the RTI 4100--a high performance laser Fizeau interferometer especially suited for inspection of site wafer flatness. High accuracy data taken y the instrument is analyzed by automated software package that performs evaluation of the user selectable sites and qualifies them using various user defined rejection criteria. In this paper, we present some aspects of the instruments' design and its measurement capabilities with interest to the semiconductor industry.
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