Titanium silicide etching in sub-half-micron device technology

Simon Y. M. Chooi; Vincent K.T. Sih; Soh Yun Siah; Zainab Ismail; Mei-Sheng Zhou

doi:10.1117/12.324027

4 September 1998 Titanium silicide etching in sub-half-micron device technology

Simon Y. M. Chooi, Vincent K.T. Sih, Soh Yun Siah, Zainab Ismail, Mei-Sheng Zhou

Proceedings Volume 3508, Multilevel Interconnect Technology II; (1998) https://doi.org/10.1117/12.324027
Event: Microelectronic Manufacturing, 1998, Santa Clara, CA, United States

Abstract

The downscaling in ULSI devices incorporating self-aligned titanium silicide (salicide) has led to the high sheet resistance and junction leakage. Silicon implantation through metal (ITM) and pre-amorphization implantation (PAI) have been investigated to address the concerns. The selective wet chemical stripping of unreacted titanium and/or titanium nitride after salicide formation (salicide etchback) is an important process and is investigated in this paper on an off- axis spray processor. The etching rates of titanium and titanium nitride that were subjected to a rapid thermal annealing (RTA) are about half that of their non-RTA counterparts. The flow rate of the components in SC-1 is found to have the most impact on the etching rates of the titanium nitride and titanium silicide. The variation of the temperature and ratio of ammonium hydroxide, hydrogen peroxide and deionized water in SC-1 produced different etching selectivity of titanium nitride and titanium to silicon dioxide and titanium silicide. The graphical profile of the both salicidation schemes in the active and field regions correlates the distinct slope patterns to the etching of different film materials, and provides a qualitative assessment in the absence of analytical depth profiling. Electrical tests reveal similar gate-to-source drain leakage values for both PAI and ITM salicide schemes using the standard SC-1 cleaning.

Citation Download Citation

Simon Y. M. Chooi, Vincent K.T. Sih, Soh Yun Siah, Zainab Ismail, and Mei-Sheng Zhou "Titanium silicide etching in sub-half-micron device technology", Proc. SPIE 3508, Multilevel Interconnect Technology II, (4 September 1998); https://doi.org/10.1117/12.324027

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