Focal plane compression 128x128 image sensor based on column parallel architecture

Takayuki Hamamoto; Yasuhiro Ohtsuka; Kiyoharu Aizawa

doi:10.1117/12.324001

7 September 1998 Focal plane compression 128x128 image sensor based on column parallel architecture

Takayuki Hamamoto, Yasuhiro Ohtsuka, Kiyoharu Aizawa

Proceedings Volume 3410, Advanced Focal Plane Arrays and Electronic Cameras II; (1998) https://doi.org/10.1117/12.324001
Event: SYBEN-Broadband European Networks and Electronic Image Capture and Publishing, 1998, Zurich, Switzerland

Abstract

In order to enhance the performance of image sensing, we have been investigating a novel image sensor which compresses image signal on the sensor focal plane. By the integration of sensing and compression, number of pixels in the image signal that has to be readout from the sensor can be significantly reduced, and the integration can consequently increase the pixel rate of the sensor. In this paper, we describe a new prototype sensor based on a column parallel architecture which has 128 X 128 pixels. We have improved the processing circuits of the new prototype to achieve much lower power dissipation and higher processing speed. We have verified that the processing circuits can be operated at 5000 frames/second.

Citation Download Citation

Takayuki Hamamoto, Yasuhiro Ohtsuka, and Kiyoharu Aizawa "Focal plane compression 128x128 image sensor based on column parallel architecture", Proc. SPIE 3410, Advanced Focal Plane Arrays and Electronic Cameras II, (7 September 1998); https://doi.org/10.1117/12.324001

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