Paper
29 June 1998 CD control for quarter-micron logic device gates using iso-pitch bias
Young-Chang Kim, Gisung Yeo, Hye-soo Shin, Hak Kim, Hoyoung Kang, U-In Chung
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Abstract
The process optimization and optical proximity effect for 0.25 micrometer gates of logic device were studied to minimize line width variation. The total line width variation was found to be composed of optical proximity effect and process uniformity. Process optimization was preceded to minimize the contribution of process uniformity, and the quantitative analysis could be done by measuring some patterns that were intentionally chosen for evaluating the optical proximity effect and other factors. It was found that the line width variation due to optical proximity effect was closely related to mask bias through this quantitative analysis. Simulations and experimental results give an important conclusion that there is a special mask bias where the degree of optical proximity effect among the different pitched patterns could be nearly neglected under certain process condition. This new condition was defined as 'Iso-Pitch Bias' and applied to decrease the optical proximity effect. Finally, CD variation as small as 20 nm, was obtained at real logic device gate patterns with optimized condition.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Young-Chang Kim, Gisung Yeo, Hye-soo Shin, Hak Kim, Hoyoung Kang, and U-In Chung "CD control for quarter-micron logic device gates using iso-pitch bias", Proc. SPIE 3334, Optical Microlithography XI, (29 June 1998); https://doi.org/10.1117/12.310793
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KEYWORDS
Critical dimension metrology

Logic devices

Quantitative analysis

Control systems

Photoresist processing

Optical proximity correction

Reflectivity

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